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| author | Wai-Hong Tam <waihong@google.com> | 2018-05-29 15:04:42 -0700 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2018-07-26 15:51:57 -0700 |
| commit | bc4f8b6f4cf0120413561df7e6733b0299e027d0 (patch) | |
| tree | 0cbe3448a5dca55e577f236cb05aad8bbb9932d2 /power | |
| parent | b5991cab2575a89e34bc1602e4233ca1819d2ee8 (diff) | |
| download | chrome-ec-bc4f8b6f4cf0120413561df7e6733b0299e027d0.tar.gz | |
cheza: Change GPIO for the rev-1 board
Reflect the chanages on the rev-1 board.
BRANCH=none
BUG=b:79548010
TEST=Verified on the rev-1 board, power-on and off, USB boot to kernel.
Change-Id: I933ff8dc171954dd6c44e0031016b300f15aa24e
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1080995
Reviewed-by: Alexandru M Stan <amstan@chromium.org>
Diffstat (limited to 'power')
| -rw-r--r-- | power/sdm845.c | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/power/sdm845.c b/power/sdm845.c index 350e940504..08b2539ccf 100644 --- a/power/sdm845.c +++ b/power/sdm845.c @@ -305,16 +305,16 @@ static void set_pmic_pwron(int enable) * 5. Release PMIC_KPD_PWR_ODL * * Power-off sequence: - * 1. Hold down PMIC_KPD_PWR_ODL and SYS_RST_L, which is a power-off + * 1. Hold down PMIC_KPD_PWR_ODL and PM845_RESIN_L, which is a power-off * trigger (requiring reprogramming PMIC registers to make - * PMIC_KPD_PWR_ODL + SYS_RST_L as a shutdown trigger) + * PMIC_KPD_PWR_ODL + PM845_RESIN_L as a shutdown trigger) * 2. PM845 pulls down AP_RST_L signal to power-off SDM845 (requreing * reprogramming PMIC to set the stage-1 and stage-2 reset timers to * 0 such that the pull down happens just after the deboucing time * of the trigger, like 2ms) * 3. SDM845 pulls down PS_HOLD signal * 4. Wait for PS_HOLD down - * 5. Release PMIC_KPD_PWR_ODL and SYS_RST_L + * 5. Release PMIC_KPD_PWR_ODL and PM845_RESIN_L * * If the above PMIC registers not programmed or programmed wrong, it * falls back to the next functions, which cuts off the system power. @@ -322,11 +322,11 @@ static void set_pmic_pwron(int enable) gpio_set_level(GPIO_PMIC_KPD_PWR_ODL, 0); if (!enable) - gpio_set_level(GPIO_SYS_RST_L, 0); + gpio_set_level(GPIO_PM845_RESIN_L, 0); wait_pmic_pwron(enable); gpio_set_level(GPIO_PMIC_KPD_PWR_ODL, 1); if (!enable) - gpio_set_level(GPIO_SYS_RST_L, 1); + gpio_set_level(GPIO_PM845_RESIN_L, 1); } enum power_state power_chipset_init(void) |