diff options
author | Jonathan Brandmeyer <jbrandmeyer@chromium.org> | 2018-06-05 09:37:22 -0600 |
---|---|---|
committer | chrome-bot <chrome-bot@chromium.org> | 2018-06-05 15:59:33 -0700 |
commit | 0776ebfbbfd016bdbe0bb8e46af0659b13e52ab9 (patch) | |
tree | b9b36750955e75e8b4afab00a8a01cd0237f2a58 /power | |
parent | 0988c5875f92c38e560ecd4c6889167c738f66a8 (diff) | |
download | chrome-ec-0776ebfbbfd016bdbe0bb8e46af0659b13e52ab9.tar.gz |
stoney: Rename GPIO_PCH_RCIN_L to GPIO_SYS_RESET_L
Pin rename only; no functional changes. See also b/72426192 for
earlier functional changes.
BUG=b:77301519
TEST=make -j buildall
BRANCH=none
Change-Id: I18e71118e584a5b36ba001bac24951929d2c93ff
Signed-off-by: Jonathan Brandmeyer <jbrandmeyer@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1087207
Reviewed-by: Edward Hill <ecgh@chromium.org>
Diffstat (limited to 'power')
-rw-r--r-- | power/stoney.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/power/stoney.c b/power/stoney.c index ebbfa85698..8ebf2f168b 100644 --- a/power/stoney.c +++ b/power/stoney.c @@ -63,9 +63,9 @@ void chipset_reset(void) /* * Send a pulse to SYS_RST to trigger a warm reset. */ - gpio_set_level(GPIO_PCH_RCIN_L, 0); + gpio_set_level(GPIO_SYS_RESET_L, 0); usleep(32 * MSEC); - gpio_set_level(GPIO_PCH_RCIN_L, 1); + gpio_set_level(GPIO_SYS_RESET_L, 1); } void chipset_throttle_cpu(int throttle) |