diff options
author | Vijay Hiremath <vijay.p.hiremath@intel.com> | 2019-05-30 16:25:15 -0700 |
---|---|---|
committer | Commit Bot <commit-bot@chromium.org> | 2019-06-13 23:02:44 +0000 |
commit | 8ca44cb4eca69d44e9fce0b93b58be9c7d9d19f3 (patch) | |
tree | 4913ea0403d24fc4574bfa2941ee4de7e28a000c /power | |
parent | 037eb91f65510d2949289f837c716b7fa997746f (diff) | |
download | chrome-ec-8ca44cb4eca69d44e9fce0b93b58be9c7d9d19f3.tar.gz |
intel_x86/power: Consolidate chipset specific power signals array
Currently chipset specific power signals are defined at board/baseboard
level. These power signals are moved to chipset specific file to minimize
the redundant power signals array defined for each board/baseboard.
BUG=b:134079574
BRANCH=none
TEST=make buildall -j
Change-Id: I351904f7cd2e0f27844c0711beb118d390219581
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1636837
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Diffstat (limited to 'power')
-rw-r--r-- | power/apollolake.c | 48 | ||||
-rw-r--r-- | power/apollolake.h | 17 | ||||
-rw-r--r-- | power/cometlake.c | 36 | ||||
-rw-r--r-- | power/cometlake.h | 13 | ||||
-rw-r--r-- | power/common.c | 3 | ||||
-rw-r--r-- | power/icelake.c | 36 | ||||
-rw-r--r-- | power/icelake.h | 13 | ||||
-rw-r--r-- | power/intel_x86.c | 24 | ||||
-rw-r--r-- | power/intel_x86.h | 24 | ||||
-rw-r--r-- | power/skylake.c | 38 | ||||
-rw-r--r-- | power/skylake.h | 15 |
11 files changed, 240 insertions, 27 deletions
diff --git a/power/apollolake.c b/power/apollolake.c index a9ac1c06d9..36c78c8158 100644 --- a/power/apollolake.c +++ b/power/apollolake.c @@ -5,7 +5,6 @@ /* Apollolake chipset power control module for Chrome EC */ -#include "apollolake.h" #include "chipset.h" #include "console.h" #include "gpio.h" @@ -22,6 +21,53 @@ */ static int force_shutdown; +/* Power signals list. Must match order of enum power_signal. */ +const struct power_signal_info power_signal_list[] = { +#ifdef CONFIG_POWER_S0IX + [X86_SLP_S0_N] = { + GPIO_PCH_SLP_S0_L, + POWER_SIGNAL_ACTIVE_HIGH | POWER_SIGNAL_DISABLE_AT_BOOT, + "SLP_S0_DEASSERTED", + }, +#endif + [X86_SLP_S3_N] = { + GPIO_PCH_SLP_S3_L, + POWER_SIGNAL_ACTIVE_HIGH, + "SLP_S3_DEASSERTED", + }, + [X86_SLP_S4_N] = { + GPIO_PCH_SLP_S4_L, + POWER_SIGNAL_ACTIVE_HIGH, + "SLP_S4_DEASSERTED", + }, + [X86_SUSPWRDNACK] = { + GPIO_SUSPWRDNACK, + POWER_SIGNAL_ACTIVE_HIGH, + "SUSPWRDNACK_DEASSERTED", + }, + [X86_ALL_SYS_PG] = { + GPIO_ALL_SYS_PGOOD, + POWER_SIGNAL_ACTIVE_HIGH, + "ALL_SYS_PGOOD", + }, + [X86_RSMRST_N] = { + GPIO_RSMRST_L_PGOOD, + POWER_SIGNAL_ACTIVE_HIGH, + "RSMRST_L", + }, + [X86_PGOOD_PP3300] = { + GPIO_PP3300_PG, + POWER_SIGNAL_ACTIVE_HIGH, + "PP3300_PG", + }, + [X86_PGOOD_PP5000] = { + GPIO_PP5000_PG, + POWER_SIGNAL_ACTIVE_HIGH, + "PP5000_PG", + }, +}; +BUILD_ASSERT(ARRAY_SIZE(power_signal_list) == POWER_SIGNAL_COUNT); + __attribute__((weak)) void chipset_do_shutdown(void) { /* Need to implement board specific shutdown */ diff --git a/power/apollolake.h b/power/apollolake.h index da5e86121f..cc864f26c3 100644 --- a/power/apollolake.h +++ b/power/apollolake.h @@ -32,4 +32,21 @@ #define CHARGER_INITIALIZED_DELAY_MS 100 #define CHARGER_INITIALIZED_TRIES 40 +enum power_signal { +#ifdef CONFIG_POWER_S0IX + X86_SLP_S0_N, /* PCH -> SLP_S0_L */ +#endif + X86_SLP_S3_N, /* PCH -> SLP_S3_L */ + X86_SLP_S4_N, /* PCH -> SLP_S4_L */ + X86_SUSPWRDNACK, /* PCH -> SUSPWRDNACK */ + + X86_ALL_SYS_PG, /* PMIC -> PMIC_EC_PWROK_OD */ + X86_RSMRST_N, /* PMIC -> PMIC_EC_RSMRST_ODL */ + X86_PGOOD_PP3300, /* PMIC -> PP3300_PG_OD */ + X86_PGOOD_PP5000, /* PMIC -> PP5000_PG_OD */ + + /* Number of X86 signals */ + POWER_SIGNAL_COUNT +}; + #endif /* __CROS_EC_APOLLOLAKE_H */ diff --git a/power/cometlake.c b/power/cometlake.c index ec0052ff85..32363a5f34 100644 --- a/power/cometlake.c +++ b/power/cometlake.c @@ -5,7 +5,6 @@ /* Cometlake chipset power control module for Chrome EC */ -#include "cometlake.h" #include "chipset.h" #include "console.h" #include "gpio.h" @@ -18,6 +17,41 @@ /* Console output macros */ #define CPRINTS(format, args...) cprints(CC_CHIPSET, format, ## args) +/* Power signals list. Must match order of enum power_signal. */ +const struct power_signal_info power_signal_list[] = { + [X86_SLP_S0_DEASSERTED] = { + GPIO_PCH_SLP_S0_L, + POWER_SIGNAL_ACTIVE_HIGH | POWER_SIGNAL_DISABLE_AT_BOOT, + "SLP_S0_DEASSERTED", + }, + [X86_SLP_S3_DEASSERTED] = { + SLP_S3_SIGNAL_L, + POWER_SIGNAL_ACTIVE_HIGH, + "SLP_S3_DEASSERTED", + }, + [X86_SLP_S4_DEASSERTED] = { + SLP_S4_SIGNAL_L, + POWER_SIGNAL_ACTIVE_HIGH, + "SLP_S4_DEASSERTED", + }, + [X86_RSMRST_L_PGOOD] = { + GPIO_RSMRST_L_PGOOD, + POWER_SIGNAL_ACTIVE_HIGH, + "RSMRST_L_PGOOD", + }, + [PP5000_A_PGOOD] = { + GPIO_PP5000_A_PG_OD, + POWER_SIGNAL_ACTIVE_HIGH, + "PP5000_A_PGOOD", + }, + [ALL_SYS_PGOOD] = { + GPIO_PG_EC_ALL_SYS_PWRGD, + POWER_SIGNAL_ACTIVE_HIGH, + "ALL_SYS_PWRGD", + }, +}; +BUILD_ASSERT(ARRAY_SIZE(power_signal_list) == POWER_SIGNAL_COUNT); + static int forcing_shutdown; /* Forced shutdown in progress? */ void chipset_force_shutdown(enum chipset_shutdown_reason reason) diff --git a/power/cometlake.h b/power/cometlake.h index c40562da17..5c9762ca58 100644 --- a/power/cometlake.h +++ b/power/cometlake.h @@ -26,4 +26,17 @@ #define CHARGER_INITIALIZED_DELAY_MS 100 #define CHARGER_INITIALIZED_TRIES 40 +/* Power signals list */ +enum power_signal { + X86_SLP_S0_DEASSERTED, + X86_SLP_S3_DEASSERTED, + X86_SLP_S4_DEASSERTED, + X86_RSMRST_L_PGOOD, + PP5000_A_PGOOD, + ALL_SYS_PGOOD, + + /* Number of X86 signals */ + POWER_SIGNAL_COUNT +}; + #endif /* __CROS_EC_COMETLAKE_H */ diff --git a/power/common.c b/power/common.c index 6d7fb7869d..f33e589d4f 100644 --- a/power/common.c +++ b/power/common.c @@ -11,17 +11,18 @@ #include "common.h" #include "console.h" #include "display_7seg.h" +#include "espi.h" #include "extpower.h" #include "gpio.h" #include "hooks.h" #include "host_command.h" +#include "intel_x86.h" #include "lpc.h" #include "power.h" #include "system.h" #include "task.h" #include "timer.h" #include "util.h" -#include "espi.h" /* Console output macros */ #define CPUTS(outstr) cputs(CC_CHIPSET, outstr) diff --git a/power/icelake.c b/power/icelake.c index 86f0f7e459..27a8b60c97 100644 --- a/power/icelake.c +++ b/power/icelake.c @@ -5,7 +5,6 @@ /* Icelake chipset power control module for Chrome EC */ -#include "icelake.h" #include "chipset.h" #include "console.h" #include "gpio.h" @@ -23,6 +22,41 @@ static int forcing_shutdown; /* Forced shutdown in progress? */ +/* Power signals list. Must match order of enum power_signal. */ +const struct power_signal_info power_signal_list[] = { + [X86_SLP_S0_DEASSERTED] = { + GPIO_PCH_SLP_S0_L, + POWER_SIGNAL_ACTIVE_HIGH | POWER_SIGNAL_DISABLE_AT_BOOT, + "SLP_S0_DEASSERTED", + }, + [X86_SLP_S3_DEASSERTED] = { + SLP_S3_SIGNAL_L, + POWER_SIGNAL_ACTIVE_HIGH, + "SLP_S3_DEASSERTED", + }, + [X86_SLP_S4_DEASSERTED] = { + SLP_S4_SIGNAL_L, + POWER_SIGNAL_ACTIVE_HIGH, + "SLP_S4_DEASSERTED", + }, + [X86_SLP_SUS_DEASSERTED] = { + GPIO_SLP_SUS_L, + POWER_SIGNAL_ACTIVE_HIGH, + "SLP_SUS_DEASSERTED", + }, + [X86_RSMRST_L_PGOOD] = { + GPIO_PG_EC_RSMRST_ODL, + POWER_SIGNAL_ACTIVE_HIGH, + "RSMRST_L_PGOOD", + }, + [X86_DSW_DPWROK] = { + GPIO_PG_EC_DSW_PWROK, + POWER_SIGNAL_ACTIVE_HIGH, + "DSW_DPWROK", + }, +}; +BUILD_ASSERT(ARRAY_SIZE(power_signal_list) == POWER_SIGNAL_COUNT); + void chipset_force_shutdown(enum chipset_shutdown_reason reason) { int timeout_ms = 50; diff --git a/power/icelake.h b/power/icelake.h index f28e1d71dd..5eeb3fb037 100644 --- a/power/icelake.h +++ b/power/icelake.h @@ -26,4 +26,17 @@ #define CHARGER_INITIALIZED_DELAY_MS 100 #define CHARGER_INITIALIZED_TRIES 40 +/* Power signals list */ +enum power_signal { + X86_SLP_S0_DEASSERTED, + X86_SLP_S3_DEASSERTED, + X86_SLP_S4_DEASSERTED, + X86_SLP_SUS_DEASSERTED, + X86_RSMRST_L_PGOOD, + X86_DSW_DPWROK, + + /* Number of X86 signals */ + POWER_SIGNAL_COUNT +}; + #endif /* __CROS_EC_ICELAKE_H */ diff --git a/power/intel_x86.c b/power/intel_x86.c index 838935777f..f4be052443 100644 --- a/power/intel_x86.c +++ b/power/intel_x86.c @@ -10,7 +10,6 @@ #include "chipset.h" #include "console.h" #include "ec_commands.h" -#include "espi.h" #include "gpio.h" #include "hooks.h" #include "intel_x86.h" @@ -23,20 +22,6 @@ #include "vboot.h" #include "wireless.h" -/* Chipset specific header files */ -/* Geminilake and apollolake use same power sequencing. */ -#ifdef CONFIG_CHIPSET_APL_GLK -#include "apollolake.h" -#elif defined(CONFIG_CHIPSET_CANNONLAKE) -#include "cannonlake.h" -#elif defined(CONFIG_CHIPSET_COMETLAKE) -#include "cometlake.h" -#elif defined(CONFIG_CHIPSET_ICELAKE) -#include "icelake.h" -#elif defined(CONFIG_CHIPSET_SKYLAKE) -#include "skylake.h" -#endif - /* Console output macros */ #define CPRINTS(format, args...) cprints(CC_CHIPSET, format, ## args) #define CPRINTF(format, args...) cprintf(CC_CHIPSET, format, ## args) @@ -50,13 +35,8 @@ enum sys_sleep_state { }; static const int sleep_sig[] = { -#ifdef CONFIG_HOSTCMD_ESPI_VW_SLP_SIGNALS - [SYS_SLEEP_S3] = VW_SLP_S3_L, - [SYS_SLEEP_S4] = VW_SLP_S4_L, -#else - [SYS_SLEEP_S3] = GPIO_PCH_SLP_S3_L, - [SYS_SLEEP_S4] = GPIO_PCH_SLP_S4_L, -#endif + [SYS_SLEEP_S3] = SLP_S3_SIGNAL_L, + [SYS_SLEEP_S4] = SLP_S4_SIGNAL_L, #ifdef CONFIG_POWER_S0IX [SYS_SLEEP_S0IX] = GPIO_PCH_SLP_S0_L, #endif diff --git a/power/intel_x86.h b/power/intel_x86.h index bfbf89538c..452b033838 100644 --- a/power/intel_x86.h +++ b/power/intel_x86.h @@ -9,8 +9,32 @@ #ifndef __CROS_EC_INTEL_X86_H #define __CROS_EC_INTEL_X86_H +#include "espi.h" #include "power.h" +/* Chipset specific header files */ +/* Geminilake and apollolake use same power sequencing. */ +#ifdef CONFIG_CHIPSET_APL_GLK +#include "apollolake.h" +#elif defined(CONFIG_CHIPSET_CANNONLAKE) +#include "cannonlake.h" +#elif defined(CONFIG_CHIPSET_COMETLAKE) +#include "cometlake.h" +#elif defined(CONFIG_CHIPSET_ICELAKE) +#include "icelake.h" +#elif defined(CONFIG_CHIPSET_SKYLAKE) +#include "skylake.h" +#endif + +/* GPIO for power signal */ +#ifdef CONFIG_HOSTCMD_ESPI_VW_SLP_SIGNALS +#define SLP_S3_SIGNAL_L VW_SLP_S3_L +#define SLP_S4_SIGNAL_L VW_SLP_S4_L +#else +#define SLP_S3_SIGNAL_L GPIO_PCH_SLP_S3_L +#define SLP_S4_SIGNAL_L GPIO_PCH_SLP_S4_L +#endif + /** * Handle RSMRST signal. * diff --git a/power/skylake.c b/power/skylake.c index a5cf6aa0a5..ce6b823b5e 100644 --- a/power/skylake.c +++ b/power/skylake.c @@ -13,7 +13,6 @@ #include "lpc.h" #include "panic.h" #include "power_button.h" -#include "skylake.h" #include "system.h" #include "timer.h" @@ -22,6 +21,43 @@ static int forcing_shutdown; /* Forced shutdown in progress? */ +/* Power signals list. Must match order of enum power_signal. */ +const struct power_signal_info power_signal_list[] = { +#ifdef CONFIG_POWER_S0IX + [X86_SLP_S0_DEASSERTED] = { + GPIO_PCH_SLP_S0_L, + POWER_SIGNAL_ACTIVE_HIGH | POWER_SIGNAL_DISABLE_AT_BOOT, + "SLP_S0_DEASSERTED", + }, +#endif + [X86_SLP_S3_DEASSERTED] = { + SLP_S3_SIGNAL_L, + POWER_SIGNAL_ACTIVE_HIGH, + "SLP_S3_DEASSERTED", + }, + [X86_SLP_S4_DEASSERTED] = { + SLP_S4_SIGNAL_L, + POWER_SIGNAL_ACTIVE_HIGH, + "SLP_S4_DEASSERTED", + }, + [X86_SLP_SUS_DEASSERTED] = { + GPIO_PCH_SLP_SUS_L, + POWER_SIGNAL_ACTIVE_HIGH, + "SLP_SUS_DEASSERTED", + }, + [X86_RSMRST_L_PWRGD] = { + GPIO_RSMRST_L_PGOOD, + POWER_SIGNAL_ACTIVE_HIGH, + "RSMRST_N_PWRGD", + }, + [X86_PMIC_DPWROK] = { + GPIO_PMIC_DPWROK, + POWER_SIGNAL_ACTIVE_HIGH, + "PMIC_DPWROK", + }, +}; +BUILD_ASSERT(ARRAY_SIZE(power_signal_list) == POWER_SIGNAL_COUNT); + void chipset_force_shutdown(enum chipset_shutdown_reason reason) { diff --git a/power/skylake.h b/power/skylake.h index 431cccf836..c8a656c6c5 100644 --- a/power/skylake.h +++ b/power/skylake.h @@ -33,6 +33,21 @@ #define CHARGER_INITIALIZED_DELAY_MS 100 #define CHARGER_INITIALIZED_TRIES 40 +/* Power signals list */ +enum power_signal { +#ifdef CONFIG_POWER_S0IX + X86_SLP_S0_DEASSERTED, +#endif + X86_SLP_S3_DEASSERTED, + X86_SLP_S4_DEASSERTED, + X86_SLP_SUS_DEASSERTED, + X86_RSMRST_L_PWRGD, + X86_PMIC_DPWROK, + + /* Number of X86 signals */ + POWER_SIGNAL_COUNT +}; + /* * Board can define this function to indicate to the skylake * power code that it does not have working reset flags. |