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| author | Scott <scollyer@chromium.org> | 2016-09-01 14:15:14 -0700 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2016-09-23 12:21:40 -0700 |
| commit | f4cd079d057b7a89ac3a14c230a64ee4dd2e363d (patch) | |
| tree | 2e86c80c14fd0cad255c6d31e1a035165196ab5b /include | |
| parent | 3831cef72810b3b4a3f64acb64ec8711198ccdfc (diff) | |
| download | chrome-ec-f4cd079d057b7a89ac3a14c230a64ee4dd2e363d.tar.gz | |
Cr50: Add gpio input for platform reset (plt_rst_l)
For TPM operation with Intel chipset APs, the signal PLT_RST_L needs
to trigger a TPM reset. For current Reef boards, this signal is
connected to DIOA13. The next version will have it on DIOM3.
This CL adds support for platform reset connected on DIOA13 and uses a
new board property so that it doesn't affect Kevin/Gru.
BRANCH=none
BUG=chrome-os-partner:55115
TEST=manual
Used H1 dev board configured as Reef. Created high to low transisition
on to verify that platform reset was detected. Tested on Kevin to
ensure that resets were not occurring.
Change-Id: I58f02b7ffa644a9197f4303ae6e640df181040bd
Signed-off-by: Scott <scollyer@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/380336
Commit-Ready: Scott Collyer <scollyer@chromium.org>
Tested-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
Diffstat (limited to 'include')
| -rw-r--r-- | include/system.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/include/system.h b/include/system.h index 92a47e2a37..b8895c02e2 100644 --- a/include/system.h +++ b/include/system.h @@ -480,6 +480,7 @@ void system_clear_retry_counter(void); /* controller gets a request */ /* TODO(crosbug.com/p/56945): Remove when sys_rst_l has an external pullup */ #define BOARD_NEEDS_SYS_RST_PULL_UP (1 << 5) /* Add a pullup to sys_rst_l */ +#define BOARD_USE_PLT_RESET (1 << 6) /* Platform reset exists */ /** * Get board properites |