diff options
author | Alec Berg <alecaberg@chromium.org> | 2015-05-04 09:22:42 -0700 |
---|---|---|
committer | ChromeOS Commit Bot <chromeos-commit-bot@chromium.org> | 2015-05-22 18:12:02 +0000 |
commit | 37a23855f7bba522f4cb300d8f4547764e5e3578 (patch) | |
tree | 5c17c6562bfb1231e164c75800e0d6ef3f3de5d0 /include | |
parent | 608fa5efd868325ce85fca1f777a89c0909ea032 (diff) | |
download | chrome-ec-37a23855f7bba522f4cb300d8f4547764e5e3578.tar.gz |
pd: add first version of TCPCI I2C interface
Add first version of TCPCI (type-C port controller interface),
which is an I2C protocol for interfacing with TCPCs.
This is roughly tracking version 0.56 of the PD Interface spec.
BUG=none
BRANCH=none
TEST=tested on oak. modified oak EC to be TCPM and oak PD to
be TCPC and tested we can negotiate with hoho and zinger.
Change-Id: I83644ca83f2d3ce69d5d8356beca20a7ab155a87
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/270172
Diffstat (limited to 'include')
-rw-r--r-- | include/usb_pd_tcpc.h | 26 | ||||
-rw-r--r-- | include/usb_pd_tcpm.h | 192 |
2 files changed, 166 insertions, 52 deletions
diff --git a/include/usb_pd_tcpc.h b/include/usb_pd_tcpc.h new file mode 100644 index 0000000000..b954c6f7ae --- /dev/null +++ b/include/usb_pd_tcpc.h @@ -0,0 +1,26 @@ +/* Copyright 2015 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/* USB Power delivery port controller */ + +#ifndef __USB_PD_TCPC_H +#define __USB_PD_TCPC_H + +#ifndef CONFIG_TCPC_I2C_BASE_ADDR +#define CONFIG_TCPC_I2C_BASE_ADDR 0x9c +#endif + +/** + * Process incoming TCPCI I2C command + * + * @param read This is a read request. If 0, this is a write request. + * @param len Length of incoming payload + * @param payload Pointer to incoming and outgoing data + * @param send_response Function to call to send response if necessary + */ +void tcpc_i2c_process(int read, int port, int len, uint8_t *payload, + void (*send_response)(int)); + +#endif /* __USB_PD_TCPC_H */ diff --git a/include/usb_pd_tcpm.h b/include/usb_pd_tcpm.h index c598869593..8e935e155f 100644 --- a/include/usb_pd_tcpm.h +++ b/include/usb_pd_tcpm.h @@ -5,21 +5,8 @@ /* USB Power delivery port management */ -#define TCPC_ALERT0 0 -#define TCPC_ALERT0_I2C_WAKE (1<<7) -#define TCPC_ALERT0_POWER_STATUS (1<<6) -#define TCPC_ALERT0_CC_STATUS (1<<5) -#define TCPC_ALERT0_RX_STATUS (1<<4) -#define TCPC_ALERT0_RX_HARD_RST (1<<3) -#define TCPC_ALERT0_TX_SUCCESS (1<<2) -#define TCPC_ALERT0_TX_DISCARDED (1<<1) -#define TCPC_ALERT0_TX_FAILED (1<<0) -#define TCPC_ALERT0_TX_COMPLETE (TCPC_ALERT0_TX_SUCCESS | \ - TCPC_ALERT0_TX_FAILED | \ - TCPC_ALERT0_TX_FAILED) - -#define TCPC_ALERT1 1 -#define TCPC_ALERT1_GPIO_CHANGE (1<<3) +#ifndef __USB_PD_TCPM_H +#define __USB_PD_TCPM_H /* Default retry count for transmitting */ #define PD_RETRY_COUNT 3 @@ -27,6 +14,117 @@ /* Time to wait for TCPC to complete transmit */ #define PD_T_TCPC_TX_TIMEOUT (100*MSEC) +#define TCPC_REG_VENDOR_ID 0x0 +#define TCPC_REG_PRODUCT_ID 0x2 +#define TCPC_REG_BCD_DEV 0x4 +#define TCPC_REG_TC_REV 0x6 +#define TCPC_REG_PD_REV 0x8 +#define TCPC_REG_PD_INT_REV 0xa +#define TCPC_REG_DEV_CAP_1 0xc +#define TCPC_REG_DEV_CAP_2 0xd +#define TCPC_REG_DEV_CAP_3 0xe +#define TCPC_REG_DEV_CAP_4 0xf +#define TCPC_REG_ALERT1 0x10 +#define TCPC_REG_ALERT1_SLEEP_EXITED (1<<7) +#define TCPC_REG_ALERT1_POWER_STATUS (1<<6) +#define TCPC_REG_ALERT1_CC_STATUS (1<<5) +#define TCPC_REG_ALERT1_RX_STATUS (1<<4) +#define TCPC_REG_ALERT1_RX_HARD_RST (1<<3) +#define TCPC_REG_ALERT1_TX_SUCCESS (1<<2) +#define TCPC_REG_ALERT1_TX_DISCARDED (1<<1) +#define TCPC_REG_ALERT1_TX_FAILED (1<<0) +#define TCPC_REG_ALERT1_TX_COMPLETE (TCPC_REG_ALERT1_TX_SUCCESS | \ + TCPC_REG_ALERT1_TX_FAILED | \ + TCPC_REG_ALERT1_TX_FAILED) + +#define TCPC_REG_ALERT2 0x11 +#define TCPC_REG_ALERT3 0x12 +#define TCPC_REG_ALERT4 0x13 +#define TCPC_REG_ALERT_MASK_1 0x14 +#define TCPC_REG_ALERT_MASK_2 0x15 +#define TCPC_REG_POWER_STATUS_MASK 0x16 +#define TCPC_REG_CC1_STATUS 0x18 +#define TCPC_REG_CC2_STATUS 0x19 +#define TCPC_REG_CC_STATUS_SET(term, volt) \ + ((term) << 3 | volt) +#define TCPC_REG_CC_STATUS_TERM(reg) (((reg) & 0x38) >> 3) +#define TCPC_REG_CC_STATUS_VOLT(reg) ((reg) & 0x7) +enum tcpc_cc_termination_status { + TYPEC_CC_TERM_RA = 0, + TYPEC_CC_TERM_RP_DEF = 1, + TYPEC_CC_TERM_RP_1_5 = 2, + TYPEC_CC_TERM_RP_3_0 = 3, + TYPEC_CC_TERM_RD = 4, + TYPEC_CC_TERM_VCONN = 5, + TYPEC_CC_TERM_OPEN = 6 +}; +enum tcpc_cc_voltage_status { + TYPEC_CC_VOLT_RA = 0, + TYPEC_CC_VOLT_SNK_DEF = 1, + TYPEC_CC_VOLT_SNK_1_5 = 2, + TYPEC_CC_VOLT_SNK_3_0 = 3, + TYPEC_CC_VOLT_SRC_DEF = 4, + TYPEC_CC_VOLT_SRC_1_5 = 5, + TYPEC_CC_VOLT_SRC_3_0 = 6, + TYPEC_CC_VOLT_OPEN = 7 +}; +/* Check if CC voltage is within Rd */ +#define TYPEC_CC_IS_RD(cc) ((cc) >= TYPEC_CC_VOLT_SNK_DEF && \ + (cc) <= TYPEC_CC_VOLT_SNK_3_0) + +#define TCPC_REG_POWER_STATUS 0x1a +#define TCPC_REG_ROLE_CTRL 0x1b +#define TCPC_REG_ROLE_CTRL_SET(drp, rp, cc2, cc1) \ + ((drp) << 6 | (rp) << 4 | (cc2) << 2 | (cc1)) +#define TCPC_REG_ROLE_CTRL_CC2(reg) (((reg) & 0xc) >> 2) +#define TCPC_REG_ROLE_CTRL_CC1(reg) ((reg) & 0x3) +enum tcpc_cc_pull { + TYPEC_CC_RA = 0, + TYPEC_CC_RP = 1, + TYPEC_CC_RD = 2, + TYPEC_CC_OPEN = 3, +}; + +#define TCPC_REG_POWER_PATH_CTRL 0x1c +#define TCPC_REG_POWER_CTRL 0x1d +#define TCPC_REG_POWER_CTRL_SET(polarity, vconn) \ + ((polarity) << 4 | (vconn)) +#define TCPC_REG_POWER_CTRL_POLARITY(reg) (((reg) & 0x10) >> 4) +#define TCPC_REG_POWER_CTRL_VCONN(reg) ((reg) & 0x1) + +#define TCPC_REG_COMMAND 0x23 +#define TCPC_REG_MSG_HDR_INFO 0x2e +#define TCPC_REG_MSG_HDR_INFO_SET(drole, prole) \ + ((drole) << 3 | (PD_REV20 << 1) | (prole)) +#define TCPC_REG_MSG_HDR_INFO_DROLE(reg) (((reg) & 0x8) >> 3) +#define TCPC_REG_MSG_HDR_INFO_PROLE(reg) ((reg) & 0x1) + +#define TCPC_REG_RX_BYTE_CNT 0x2f +#define TCPC_REG_RX_STATUS 0x30 +#define TCPC_REG_RX_DETECT 0x31 +#define TCPC_REG_RX_HDR 0x32 +#define TCPC_REG_RX_DATA 0x34 /* through 0x4f */ + +#define TCPC_REG_TRANSMIT 0x50 +#define TCPC_REG_TRANSMIT_SET(type) \ + (PD_RETRY_COUNT << 4 | (type)) +#define TCPC_REG_TRANSMIT_RETRY(reg) (((reg) & 0x30) >> 4) +#define TCPC_REG_TRANSMIT_TYPE(reg) ((reg) & 0x7) +enum tcpm_transmit_type { + TRANSMIT_SOP = 0, + TRANSMIT_SOP_PRIME = 1, + TRANSMIT_SOP_PRIME_PRIME = 2, + TRANSMIT_SOP_DEBUG_PRIME = 3, + TRANSMIT_SOP_DEBUG_PRIME_PRIME = 4, + TRANSMIT_HARD_RESET = 5, + TRANSMIT_CABLE_RESET = 6, + TRANSMIT_BIST_MODE_2 = 7 +}; + +#define TCPC_REG_TX_BYTE_CNT 0x51 +#define TCPC_REG_TX_HDR 0x52 +#define TCPC_REG_TX_DATA 0x54 /* through 0x6f */ + /** * TCPC is asserting alert */ @@ -53,59 +151,53 @@ int tcpc_run(int port, int evt); * * @param port Type-C port number * @param alert_reg Alert register to read + * @param alert Pointer to location to store alert status + * + * @return EC_SUCCESS or error */ -int tcpm_alert_status(int port, int alert_reg); +int tcpm_alert_status(int port, int alert_reg, uint8_t *alert); /** * Read the CC line status. * * @param port Type-C port number - * @param polarity Polarity of the CC line to read + * @param cc1 pointer to CC status for CC1 + * @param cc2 pointer to CC status for CC2 * - * @return CC status from enum tcpc_cc_status + * @return EC_SUCCESS or error */ -enum tcpc_cc_status { -/* CC status when we are a source (we expose Rp) */ - TYPEC_CC_SRC_RA, - TYPEC_CC_SRC_RD, - TYPEC_CC_SRC_OPEN, -/* CC status when we are a sink (we expose Rd) */ - TYPEC_CC_SNK_PWR_3_0, - TYPEC_CC_SNK_PWR_1_5, - TYPEC_CC_SNK_PWR_DEFAULT, - TYPEC_CC_SNK_OPEN -}; -int tcpm_get_cc(int port, int polarity); +int tcpm_get_cc(int port, int *cc1, int *cc2); /** * Set the CC pull resistor. This sets our role as either source or sink. * * @param port Type-C port number * @param pull One of enum tcpc_cc_pull + * + * @return EC_SUCCESS or error */ -enum tcpc_cc_pull { - TYPEC_CC_RP, - TYPEC_CC_RD, - TYPEC_CC_OPEN -}; -void tcpm_set_cc(int port, int pull); +int tcpm_set_cc(int port, int pull); /** * Set polarity * * @param port Type-C port number * @param polarity 0=> transmit on CC1, 1=> transmit on CC2 + * + * @return EC_SUCCESS or error */ -void tcpm_set_polarity(int port, int polarity); +int tcpm_set_polarity(int port, int polarity); /** * Set Vconn. * * @param port Type-C port number * @param polarity Polarity of the CC line to read + * + * @return EC_SUCCESS or error */ -void tcpm_set_vconn(int port, int enable); +int tcpm_set_vconn(int port, int enable); /** * Set PD message header to use for goodCRC @@ -113,18 +205,21 @@ void tcpm_set_vconn(int port, int enable); * @param port Type-C port number * @param power_role Power role to use in header * @param data_role Data role to use in header + * + * @return EC_SUCCESS or error */ -void tcpm_set_msg_header(int port, int power_role, int data_role); +int tcpm_set_msg_header(int port, int power_role, int data_role); /** * Read last received PD message. * * @param port Type-C port number * @param payload Pointer to location to copy payload of message + * @param header of message * - * @return header of message + * @return EC_SUCCESS or error */ -int tcpm_get_message(int port, uint32_t *payload); +int tcpm_get_message(int port, uint32_t *payload, int *head); /** * Transmit PD message @@ -134,17 +229,10 @@ int tcpm_get_message(int port, uint32_t *payload); * @param header Packet header * @param cnt Number of bytes in payload * @param data Payload + * + * @return EC_SUCCESS or error */ -enum tcpm_transmit_type { - TRANSMIT_SOP, - TRANSMIT_SOP_PRIME, - TRANSMIT_SOP_PRIME_PRIME, - TRANSMIT_SOP_DEBUG_PRIME, - TRANSMIT_SOP_DEBUG_PRIME_PRIME, - TRANSMIT_HARD_RESET, - TRANSMIT_CABLE_RESET, - TRANSMIT_BIST_MODE_2 -}; -void tcpm_transmit(int port, enum tcpm_transmit_type type, uint16_t header, +int tcpm_transmit(int port, enum tcpm_transmit_type type, uint16_t header, const uint32_t *data); +#endif /* __USB_PD_TCPM_H */ |