summaryrefslogtreecommitdiff
path: root/include
diff options
context:
space:
mode:
authorKevin K Wong <kevin.k.wong@intel.com>2015-04-20 17:48:21 -0700
committerChromeOS Commit Bot <chromeos-commit-bot@chromium.org>2015-04-27 23:29:30 +0000
commit5a18413ff528331a229fe8734c6bca932e5478e1 (patch)
treeed2469096bf0612fc16fde5e8b4a13fb24b1db80 /include
parentb35e4d47fc55a8ad1e1aa3f9818576176510008d (diff)
downloadchrome-ec-5a18413ff528331a229fe8734c6bca932e5478e1.tar.gz
mec1322: Added task-based Port80 POST code support.
With mec1322's EMI set to decode IO 0x800, it does not have any other interfaces to support POST code via IO 0x80. This change is to enable Port80 POST code support via polling method. Limitation: - POST Code 0xFF will be ignored. - POST Code frequency is greater than 1 msec. BUG=chrome-os-partner:39386 TEST=Verified Port80 POST code is captured in EC console. Verified "port80 task" console command will disable/enable Port80 task. Verified "port80 poll" will get the last Port80 POST code. BRANCH=none Change-Id: I27e53e84b5be1fd98464a44407dd58b93d8c798d Signed-off-by: Kevin K Wong <kevin.k.wong@intel.com> Reviewed-on: https://chromium-review.googlesource.com/266783 Reviewed-by: Randall Spangler <rspangler@chromium.org>
Diffstat (limited to 'include')
-rw-r--r--include/config.h8
-rw-r--r--include/port80.h11
2 files changed, 19 insertions, 0 deletions
diff --git a/include/config.h b/include/config.h
index cb6be599a9..c5bfde79f6 100644
--- a/include/config.h
+++ b/include/config.h
@@ -1005,6 +1005,14 @@
/*****************************************************************************/
+/*
+ * Enable polling at boot by port 80 task.
+ * Ignored if port 80 is handled by interrupt
+ */
+#undef CONFIG_PORT80_TASK_EN
+
+/*****************************************************************************/
+
/* Compile common code to support power button debouncing */
#undef CONFIG_POWER_BUTTON
diff --git a/include/port80.h b/include/port80.h
index 28966750c6..470b01cc4b 100644
--- a/include/port80.h
+++ b/include/port80.h
@@ -13,6 +13,7 @@
enum port_80_event {
PORT_80_EVENT_RESUME = 0x1001, /* S3->S0 transition */
PORT_80_EVENT_RESET = 0x1002, /* RESET transition */
+ PORT_80_IGNORE = 0xffff, /* Invalid POST CODE */
};
/**
@@ -22,4 +23,14 @@ enum port_80_event {
*/
void port_80_write(int data);
+#ifdef HAS_TASK_PORT80
+/**
+ * Chip specific function to read from port 80.
+ *
+ * @return data from the last LPC write to port 80,
+ * or PORT_80_IGNORE if no data is available.
+ */
+int port_80_read(void);
+#endif
+
#endif /* __CROS_EC_PORT80_H */