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authorScott Collyer <scollyer@google.com>2019-08-15 15:01:42 -0700
committerCommit Bot <commit-bot@chromium.org>2019-09-04 02:00:12 +0000
commit792e0a1de80d97cf9772e998ed84adb262dd12b0 (patch)
treecfb794c6889f32908128491d036f882e089667c7 /include
parent6881fa3712de15d4b938dcb330bae7744a6db4bf (diff)
downloadchrome-ec-792e0a1de80d97cf9772e998ed84adb262dd12b0.tar.gz
cometlake: Minimize delay for high->low rsmrst passthrough
Hatch designs buffer the PG_EC_RSMRST# signal from the Silego power good logic through the EC and out EC_PCH_RSMRST# to the SoC RSMRST# pin. For power off transitions, this should be as fast as possible, in the ns region if possible. However this time is ~1 msec. To reduce this delay as much as possible this CL introduces a new interrupt handler than can be linked to the rsmrst gpio signal. This interrupt routine handles high->low transitions directly to minimize the propagation delay. The power_signal_interrupt is then called which will wake up the chipset task, and low->high transistions continue to be handled in the power state machine. BUG=b:132421681 BRANCH=None TEST=Shorted PP1050_A_PG to ground to force an abrupt power down and then measured time via scope between PG_EC_RSMRST and EC_PCH_RSMRST. The delay is reduced from ~1 msec to 45 uSec. Change-Id: I266138a2e235ce47f3060f8e1f6f9bc6a75073ae Signed-off-by: Scott Collyer <scollyer@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1757267 Tested-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Furquan Shaikh <furquan@chromium.org> Commit-Queue: Scott Collyer <scollyer@chromium.org>
Diffstat (limited to 'include')
-rw-r--r--include/power.h11
1 files changed, 11 insertions, 0 deletions
diff --git a/include/power.h b/include/power.h
index 60f071a1dc..fac596d44c 100644
--- a/include/power.h
+++ b/include/power.h
@@ -180,6 +180,17 @@ static inline void power_signal_interrupt(enum gpio_signal signal) { }
#endif /* !HAS_TASK_CHIPSET */
/**
+ * Interrupt handler for rsmrst signal GPIO. This interrupt handler should be
+ * used when there is a requirement to have minimum pass through delay between
+ * the rsmrst coming to the EC and the rsmrst that goes to the PCH for high->low
+ * transitions. Low->high transitions are still handled from within the chipset
+ * task power state machine.
+ *
+ * @param signal - The gpio signal that triggered the interrupt.
+ */
+void intel_x86_rsmrst_signal_interrupt(enum gpio_signal signal);
+
+/**
* pause_in_s5 getter method.
*
* @return Whether we should pause in S5 when shutting down.