cr50: rework sleep state and tpm reset triggers

The cr50 needs to be aware of the power state of the system and of the
moment when the AP is reset, because this is when the TPM needs to be
reset too.

Arm and x86 platforms provide different hints in these cases.

In case of x86 there is a single signal cr50 can rely on: PLT_RST_L.
This active low signal is asserted when the system is going into any
power state deeper than s0ix. The cr50 can fall into deep sleep when
PLT_RST_L is asserted, and has to wake up and reset the TPM when this
signal is deasserted. There could be other wake triggers, but the tpm
should not be reset unless PLT_RST_L is inactive. It is also important
not to fall into deep sleep when PLT_RST_L is pulsed to reboot the
system.

In case of ARM there are two separate signals. Deasserting SYS_RST_L
signal is the trigger to reset the TPM, The GPIO_DETECT_AP going low
for a duration of time is the indication of the AP going into some
kind of sleep mode. The ARM case requires more clarification.

This adds run time configuration of the the sleep state control input.
Once the input turns low, the CHIPSET_SHUTDOWN signal is sent and deep
sleep mode is enabled. Again, this will require adjustment for ARM
platforms.

The wake from deep sleep state is controlled by the wake pins as
before, but by level instead of edge. This makes sure that in case the
trigger for deep sleep goes away while deep sleep preparation is under
way, the device resumes immediately instead of getting stuck missing
the edge.

The TPM_RST_ input is now triggering interrupts on deassertion
- this is the moment when the TPM needs to be reset. The ISR is being
renamed accordingly.

The processing previously happening inside the ISR is being moved into
a deferred function running on the hooks task context.

There is no need to invoke TPM reset related functions from the PMU
wake up ISR anymore.

BRANCH=none
BUG=chrome-os-partner:59007
TEST=as follows:

  1. make buildall -j succeeds

  2. started on Reef, still in progress after 100 iterations, early to
  call

   suspend_stress_test --suspend_min 40 --suspend_max 45 \
      --wake_max 15 wake_min 10

  (note that reef does not fall into s3 any more, so the test does not
  verify H1 deep sleep)

  3. modified the target to fall into s3 during the test and
  successfully repeated it for 100 iterations

  4. tried battery disconnect a few times and observe successful boot.

Change-Id: Ica06ec0d363b53eede3be327404ff5807fa3a610
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/436865
Reviewed-by: Mary Ruthven <mruthven@chromium.org>

1 files changed, 0 insertions, 7 deletions

diff --git a/include/tpm_registers.h b/include/tpm_registers.h
index 293a0a99ac..9d5fba4cf5 100644
--- a/include/tpm_registers.h
+++ b/include/tpm_registers.h
@@ -43,13 +43,6 @@ void tpm_register_interface(interface_restart_func interface_restart);
 int tpm_reset_request(int wait_until_done, int wipe_nvmem_first);
 
 /*
- * Return true if the TPM is being reset. Usually this helps to avoid
- * unnecessary extra reset early at startup time, when TPM could be busy
- * installing endorsement certificates.
- */
-int tpm_is_resetting(void);
-
-/*
  * This structure describes the header of all commands and responses sent and
  * received over TPM FIFO.
  *