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author | Eric Yilun Lin <yllin@chromium.org> | 2023-04-06 12:55:36 +0800 |
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committer | Chromeos LUCI <chromeos-scoped@luci-project-accounts.iam.gserviceaccount.com> | 2023-04-07 08:12:19 +0000 |
commit | eea95bc3d1d4d4908e29a92b6af09a4da1b91ef4 (patch) | |
tree | a101c30a28575d656e51dca50c99ca4cdbe0066d /include/chipset.h | |
parent | 8c8a42b383ae7a04b4a210d50e291f8f0572b323 (diff) | |
download | chrome-ec-eea95bc3d1d4d4908e29a92b6af09a4da1b91ef4.tar.gz |
mt8186,mt8188: check the holder of AP_RST_ODL
To distinguish the AP shutdown, and the AP reset held by GSC/Servo,
we use the SYS_RST_ODL as the reference.
If AP_EC_SYSRST_ODL is asserted, but SYS_RST_ODL is not, this is a
normal shutdown.
If AP_EC_SYSRST_ODL is asserted, and so is SYS_RST_ODL, the AP reset
is held by GSC or Servo. In this case, we should let the power state
stay at S0 to prevent from an unexpected shutdown.
BUG=b:276229973
TEST=pass firmware_CorruptMinios
TEST=dut-control warm_reset:on sleep:1 warm:reset:off, it stays at S0
BRANCH=none
Change-Id: I9b69caa0d15e6e58e7f11ad1079536bc1954b5ce
Signed-off-by: Eric Yilun Lin <yllin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4402421
Tested-by: Eric Yilun Lin <yllin@google.com>
Reviewed-by: Ting Shen <phoenixshen@chromium.org>
Auto-Submit: Eric Yilun Lin <yllin@google.com>
Commit-Queue: Eric Yilun Lin <yllin@google.com>
Commit-Queue: Ting Shen <phoenixshen@chromium.org>
Diffstat (limited to 'include/chipset.h')
-rw-r--r-- | include/chipset.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/include/chipset.h b/include/chipset.h index ead2a9680e..c5ba6ffd6f 100644 --- a/include/chipset.h +++ b/include/chipset.h @@ -221,7 +221,7 @@ void chipset_ap_rst_interrupt(enum gpio_signal signal); /** * GPIO interrupt handler of warm reset signal from servo or H1. * - * It is used in Qualcomm chipset power sequence. + * It is used in Qualcomm/MediaTek chipset power sequence. */ void chipset_warm_reset_interrupt(enum gpio_signal signal); |