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| author | Shawn Nematbakhsh <shawnn@chromium.org> | 2015-06-26 12:27:23 -0700 |
|---|---|---|
| committer | ChromeOS Commit Bot <chromeos-commit-bot@chromium.org> | 2015-06-30 17:18:40 +0000 |
| commit | 4a56579f21e5aced3673d694fc45811cfd439d84 (patch) | |
| tree | cbd532f3ad1e54b12f665197718a3a4f68a1cf83 /driver/ps8740.h | |
| parent | 1ef8c7dc2096405e815797fd06dec628a39b4e33 (diff) | |
| download | chrome-ec-4a56579f21e5aced3673d694fc45811cfd439d84.tar.gz | |
usb_mux: Add support for Parade PS8740 chip
Initial support for Parade PS8740 Type-C redriving switch.
BUG=chrome-os-partner:41696
TEST=Manual on Glados in subsequent commit. Verify set() and get()
functions set and return consistent values. Verify that USB SS device
functions when muxes are set to dock or USB.
BRANCH=None
Change-Id: Iedbe53cc76f30ecd969c2ca99a7377ed3b193729
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/282280
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Diffstat (limited to 'driver/ps8740.h')
| -rw-r--r-- | driver/ps8740.h | 35 |
1 files changed, 35 insertions, 0 deletions
diff --git a/driver/ps8740.h b/driver/ps8740.h new file mode 100644 index 0000000000..ec27a7bf50 --- /dev/null +++ b/driver/ps8740.h @@ -0,0 +1,35 @@ +/* Copyright 2015 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + * + * Parade PS8740 USB port switch driver. + */ + +#ifndef __CROS_EC_PS8740_H +#define __CROS_EC_PS8740_H + +/* Mode register for setting mux */ +#define PS8740_REG_MODE 0x00 +#define PS8740_MODE_POLARITY_INVERTED (1 << 4) +#define PS8740_MODE_USB_ENABLED (1 << 5) +#define PS8740_MODE_DP_ENABLED (1 << 6) +#define PS8740_MODE_POWER_DOWN (1 << 7) + +/* Status register for checking mux state */ +#define PS8740_REG_STATUS 0x09 +#define PS8740_STATUS_POLARITY_INVERTED (1 << 2) +#define PS8740_STATUS_USB_ENABLED (1 << 3) +#define PS8740_STATUS_DP_ENABLED (1 << 4) +#define PS8740_STATUS_HPD_ASSERTED (1 << 7) + +/* Chip ID / revision registers and expected fused values */ +#define PS8740_REG_REVISION_ID1 0xf0 +#define PS8740_REVISION_ID1 0x00 +#define PS8740_REG_REVISION_ID2 0xf1 +#define PS8740_REVISION_ID2 0x0a +#define PS8740_REG_CHIP_ID1 0xf2 +#define PS8740_CHIP_ID1 0x40 +#define PS8740_REG_CHIP_ID2 0xf3 +#define PS8740_CHIP_ID2 0x87 + +#endif /* __CROS_EC_PS8740_H */ |