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| author | Jett Rink <jettrink@chromium.org> | 2018-05-17 18:17:45 -0700 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2018-05-24 15:44:39 -0700 |
| commit | 89275aff034cc4fb03c14e5ada1674b5d5bcbbd5 (patch) | |
| tree | 123c091e6131afb60769c9ca359efb4cc06ae667 /driver/ppc | |
| parent | 4a65a62f85ece242588d9316bf624bbd12cd54f7 (diff) | |
| download | chrome-ec-89275aff034cc4fb03c14e5ada1674b5d5bcbbd5.tar.gz | |
octopus: moving hibernate code to baseboard
bip also need to enable the sink path when going into hibernate
BRANCH=none
BUG=b:79948623
TEST=on bip, verfied that AC_OK, LID_OPEN, and POWER_BTN all wake the EC
up.
Change-Id: I2c1168f856cc45635b5c76f7ca409007fcf141cc
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1065203
Diffstat (limited to 'driver/ppc')
| -rw-r--r-- | driver/ppc/nx20p3483.h | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/driver/ppc/nx20p3483.h b/driver/ppc/nx20p3483.h index a85a0b72b4..f0979646e1 100644 --- a/driver/ppc/nx20p3483.h +++ b/driver/ppc/nx20p3483.h @@ -13,6 +13,13 @@ #define NX20P3483_ADDR2 0xE4 #define NX20P3483_ADDR3 0xE6 +/* + * This PPC hard-codes the over voltage protect of Vbus at 6.8V in dead-battery + * mode. If we ever are every going to drop the PD rail, we need to first ensure + * that Vbus is negotiated to below 6.8V otherwise we can lock out Vbus. + */ +#define NX20P3483_SAFE_RESET_VBUS_MV 5000 + /* NX20P3483 register addresses */ #define NX20P3483_DEVICE_ID_REG 0x00 #define NX20P3483_DEVICE_STATUS_REG 0x01 |