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| author | Jett Rink <jettrink@chromium.org> | 2018-08-07 14:52:04 -0600 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2018-08-23 17:42:49 -0700 |
| commit | 7487f9eef6159b9b3253b4d30e9dd0b114bd07e1 (patch) | |
| tree | 21b506771c042375da02ff0f1171b7f6712d699b /driver/ppc/sn5s330.h | |
| parent | eab2576658393d15af7fc55e97e827951cafa05e (diff) | |
| download | chrome-ec-7487f9eef6159b9b3253b4d30e9dd0b114bd07e1.tar.gz | |
sn5s330: add low power mode
Add a low power mode method for PPCs behind a new config.
Implement the low power method for SN5S330 based off of TI AE
recommendation.
BRANCH=none
BUG=b:111520593,b:111006203
TEST=CL stack produce lower power during bip hibernate
Change-Id: Icd22f88a8f65c2cd5ab1c95b0750b1eb61e91923
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1166183
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Diffstat (limited to 'driver/ppc/sn5s330.h')
| -rw-r--r-- | driver/ppc/sn5s330.h | 39 |
1 files changed, 21 insertions, 18 deletions
diff --git a/driver/ppc/sn5s330.h b/driver/ppc/sn5s330.h index 2b17a1d46a..fcb41204ef 100644 --- a/driver/ppc/sn5s330.h +++ b/driver/ppc/sn5s330.h @@ -86,34 +86,37 @@ enum sn5s330_pp_idx { #define SN5S330_ILIM_3_30 12 /* FUNC_SET_2 */ -#define SN5S330_SBU_EN (1 << 4) +#define SN5S330_SBU_EN (1 << 4) /* FUNC_SET_3 */ -#define SN5S330_PP1_EN (1 << 0) -#define SN5S330_PP2_EN (1 << 1) -#define SN5S330_VBUS_DISCH_EN (1 << 2) -#define SN5S330_SET_RCP_MODE_PP1 (1 << 5) -#define SN5S330_SET_RCP_MODE_PP2 (1 << 6) +#define SN5S330_PP1_EN (1 << 0) +#define SN5S330_PP2_EN (1 << 1) +#define SN5S330_VBUS_DISCH_EN (1 << 2) +#define SN5S330_SET_RCP_MODE_PP1 (1 << 5) +#define SN5S330_SET_RCP_MODE_PP2 (1 << 6) /* FUNC_SET_4 */ -#define SN5S330_VCONN_EN (1 << 0) -#define SN5S330_CC_POLARITY (1 << 1) -#define SN5S330_CC_EN (1 << 4) -#define SN5S330_VCONN_ILIM_SEL (1 << 5) +#define SN5S330_VCONN_EN (1 << 0) +#define SN5S330_CC_POLARITY (1 << 1) +#define SN5S330_CC_EN (1 << 4) +#define SN5S330_VCONN_ILIM_SEL (1 << 5) /* FUNC_SET_9 */ -#define SN5S330_PP2_CONFIG (1 << 2) -#define SN5S330_OVP_EN_CC (1 << 4) -#define SN5S330_CONFIG_UVP (1 << 5) +#define SN5S330_FORCE_OVP_EN_SBU (1 << 1) +#define SN5S330_PP2_CONFIG (1 << 2) +#define SN5S330_OVP_EN_CC (1 << 4) +#define SN5S330_CONFIG_UVP (1 << 5) +#define SN5S330_FORCE_ON_VBUS_OVP (1 << 6) +#define SN5S330_FORCE_ON_VBUS_UVP (1 << 7) /* INT_STATUS_REG3 */ -#define SN5S330_VBUS_GOOD (1 << 0) +#define SN5S330_VBUS_GOOD (1 << 0) /* INT_STATUS_REG4 */ -#define SN5S330_DIG_RES (1 << 0) -#define SN5S330_DB_BOOT (1 << 1) -#define SN5S330_VSAFE0V_STAT (1 << 2) -#define SN5S330_VSAFE0V_MASK (1 << 3) +#define SN5S330_DIG_RES (1 << 0) +#define SN5S330_DB_BOOT (1 << 1) +#define SN5S330_VSAFE0V_STAT (1 << 2) +#define SN5S330_VSAFE0V_MASK (1 << 3) /* * INT_MASK_RISE/FALL_EDGE_1 |