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authorJack Rosenthal <jrosenth@chromium.org>2021-11-04 12:11:58 -0600
committerCommit Bot <commit-bot@chromium.org>2021-11-05 04:22:34 +0000
commit252457d4b21f46889eebad61d4c0a65331919cec (patch)
tree01856c4d31d710b20e85a74c8d7b5836e35c3b98 /driver/ioexpander/ccgxxf.c
parent08f5a1e6fc2c9467230444ac9b582dcf4d9f0068 (diff)
downloadchrome-ec-252457d4b21f46889eebad61d4c0a65331919cec.tar.gz
In the interest of making long-term branch maintenance incur as little technical debt on us as possible, we should not maintain any files on the branch we are not actually using. This has the added effect of making it extremely clear when merging CLs from the main branch when changes have the possibility to affect us. The follow-on CL adds a convenience script to actually pull updates from the main branch and generate a CL for the update. BUG=b:204206272 BRANCH=ish TEST=make BOARD=arcada_ish && make BOARD=drallion_ish Signed-off-by: Jack Rosenthal <jrosenth@chromium.org> Change-Id: I17e4694c38219b5a0823e0a3e55a28d1348f4b18 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3262038 Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Tom Hughes <tomhughes@chromium.org>
Diffstat (limited to 'driver/ioexpander/ccgxxf.c')
-rw-r--r--driver/ioexpander/ccgxxf.c145
1 files changed, 0 insertions, 145 deletions
diff --git a/driver/ioexpander/ccgxxf.c b/driver/ioexpander/ccgxxf.c
deleted file mode 100644
index ac079d7b2f..0000000000
--- a/driver/ioexpander/ccgxxf.c
+++ /dev/null
@@ -1,145 +0,0 @@
-/* Copyright 2021 The Chromium OS Authors. All rights reserved.
- * Use of this source code is governed by a BSD-style license that can be
- * found in the LICENSE file.
- *
- * Cypress CCGXXF I/O Port expander (built inside PD chip) driver source
- */
-
-#include "console.h"
-#include "i2c.h"
-#include "ioexpander.h"
-
-/* Add after all include files */
-#include "ccgxxf.h"
-
-#define CPRINTS(format, args...) cprints(CC_GPIO, format, ## args)
-
-static inline int ccgxxf_read8(int ioex, int reg, int *data)
-{
- return i2c_read8(ioex_config[ioex].i2c_host_port,
- ioex_config[ioex].i2c_addr_flags, reg, data);
-}
-
-static inline int ccgxxf_update8(int ioex, int reg, uint8_t mask,
- enum mask_update_action action)
-{
- return i2c_update8(ioex_config[ioex].i2c_host_port,
- ioex_config[ioex].i2c_addr_flags, reg, mask, action);
-}
-
-static inline int ccgxxf_write16(int ioex, uint16_t reg, uint16_t data)
-{
- return i2c_write16(ioex_config[ioex].i2c_host_port,
- ioex_config[ioex].i2c_addr_flags, reg, data);
-}
-
-static int ccgxxf_get_level(int ioex, int port, int mask, int *val)
-{
- int rv;
-
- rv = ccgxxf_read8(ioex, CCGXXF_REG_GPIO_STATUS(port), val);
- if (!rv)
- *val = !!(*val & mask);
-
- return rv;
-}
-
-static int ccgxxf_set_level(int ioex, int port, int mask, int val)
-{
- return ccgxxf_update8(ioex, CCGXXF_REG_GPIO_CONTROL(port), mask, val);
-}
-
-/*
- * Following type of pins are supported
- * - Output pins are supported with open-drain & pull-up
- * - Input pins are supported with pull-up & pull-down
- * - Analog pins
- * - 1.8V level GPIOs are supported per port and outputs can only be
- * open-drain pins
- */
-static int ccgxxf_set_flags_by_mask(int ioex, int port, int mask, int flags)
-{
- uint16_t pin_mode;
- int rv;
-
- /* Push-pull output can't be configured for 1.8V level */
- if ((flags & GPIO_OUTPUT) && (flags & GPIO_SEL_1P8V) &&
- !(flags & GPIO_OPEN_DRAIN)) {
- CPRINTS("Invalid flags: ioex=%d, port=%d, mask=%d, flags=0x%x",
- ioex, port, mask, flags);
-
- return EC_ERROR_INVAL;
- }
-
- if (flags & GPIO_OUTPUT) {
- if (flags & GPIO_OPEN_DRAIN) {
- if (flags & GPIO_PULL_UP)
- pin_mode = CCGXXF_GPIO_MODE_RES_UP;
- else
- pin_mode = CCGXXF_GPIO_MODE_OD_LOW;
- } else {
- pin_mode = CCGXXF_GPIO_MODE_STRONG;
- }
- } else if (flags & GPIO_INPUT) {
- if (flags & GPIO_PULL_UP) {
- pin_mode = CCGXXF_GPIO_MODE_RES_UP;
- flags |= GPIO_HIGH;
- } else if (flags & GPIO_PULL_DOWN) {
- pin_mode = CCGXXF_GPIO_MODE_RES_DWN;
- flags |= GPIO_LOW;
- } else {
- pin_mode = CCGXXF_GPIO_MODE_HIZ_DIGITAL;
- }
- } else if (flags & GPIO_ANALOG) {
- pin_mode = CCGXXF_GPIO_MODE_HIZ_ANALOG;
- } else {
- return EC_ERROR_INVAL;
- }
-
- pin_mode = port | (pin_mode << CCGXXF_GPIO_PIN_MODE_SHIFT) |
- (mask << CCGXXF_GPIO_PIN_MASK_SHIFT);
-
- /* Note: once set the 1.8V level affect whole GPIO port */
- if (flags & GPIO_SEL_1P8V)
- pin_mode |= CCGXXF_GPIO_1P8V_SEL;
-
- /*
- * Before setting the GPIO mode, initilaize the pins to default value
- * to avoid spike on pins.
- */
- if (flags & (GPIO_HIGH | GPIO_LOW)) {
- rv = ccgxxf_set_level(ioex, port, mask,
- flags & GPIO_HIGH ? 1 : 0);
- if (rv)
- return rv;
- }
-
- return ccgxxf_write16(ioex, CCGXXF_REG_GPIO_MODE, pin_mode);
-}
-
-static int ccgxxf_get_flags_by_mask(int ioex, int port, int mask, int *flags)
-{
- /* TODO: Add it after implementing in the CCGXXF firmware. */
- return EC_SUCCESS;
-}
-
-static int ccgxxf_enable_interrupt(int ioex, int port, int mask, int enable)
-{
- /* CCGXXF doesn't have interrupt capability on I/O expnader pins */
- return EC_ERROR_UNIMPLEMENTED;
-}
-
-int ccgxxf_init(int ioex)
-{
- /* TCPC init of CCGXXF should handle initialization */
- return EC_SUCCESS;
-}
-
-const struct ioexpander_drv ccgxxf_ioexpander_drv = {
- .init = &ccgxxf_init,
- .get_level = &ccgxxf_get_level,
- .set_level = &ccgxxf_set_level,
- .get_flags_by_mask = &ccgxxf_get_flags_by_mask,
- .set_flags_by_mask = &ccgxxf_set_flags_by_mask,
- .enable_interrupt = &ccgxxf_enable_interrupt,
-};