diff options
| author | Gwendal Grignou <gwendal@chromium.org> | 2019-03-11 15:57:52 -0700 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2019-03-26 04:42:55 -0700 |
| commit | bb266fc26fc05d4ab22de6ad7bce5b477c9f9140 (patch) | |
| tree | f6ada087f62246c3a9547e649ac8846b0ed6d5ab /driver/gyro_l3gd20h.h | |
| parent | 0bfc511527cf2aebfa163c63a1d028419ca0b0c3 (diff) | |
| download | chrome-ec-bb266fc26fc05d4ab22de6ad7bce5b477c9f9140.tar.gz | |
common: replace 1 << digits, with BIT(digits)
Requested for linux integration, use BIT instead of 1 <<
First step replace bit operation with operand containing only digits.
Fix an error in motion_lid try to set bit 31 of a signed integer.
BUG=None
BRANCH=None
TEST=compile
Change-Id: Ie843611f2f68e241f0f40d4067f7ade726951d29
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1518659
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Diffstat (limited to 'driver/gyro_l3gd20h.h')
| -rw-r--r-- | driver/gyro_l3gd20h.h | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/driver/gyro_l3gd20h.h b/driver/gyro_l3gd20h.h index 24ad81a693..1864c5afac 100644 --- a/driver/gyro_l3gd20h.h +++ b/driver/gyro_l3gd20h.h @@ -51,25 +51,25 @@ #define L3GD20_LOW_ODR 0x39 #define L3GD20_DPS_SEL_245 (0 << 4) -#define L3GD20_DPS_SEL_500 (1 << 4) +#define L3GD20_DPS_SEL_500 BIT(4) #define L3GD20_DPS_SEL_2000_0 (2 << 4) #define L3GD20_DPS_SEL_2000_1 (3 << 4) #define L3GD20_ODR_PD (0 << 3) #define L3GD20_ODR_12_5HZ (0 << 6) -#define L3GD20_ODR_25HZ (1 << 6) +#define L3GD20_ODR_25HZ BIT(6) #define L3GD20_ODR_50HZ_0 (2 << 6) #define L3GD20_ODR_50HZ_1 (3 << 6) #define L3GD20_ODR_100HZ (0 << 6) -#define L3GD20_ODR_200HZ (1 << 6) +#define L3GD20_ODR_200HZ BIT(6) #define L3GD20_ODR_400HZ (2 << 6) #define L3GD20_ODR_800HZ (3 << 6) #define L3GD20_ODR_MASK (3 << 6) -#define L3GD20_STS_ZYXDA_MASK (1 << 3) +#define L3GD20_STS_ZYXDA_MASK BIT(3) #define L3GD20_RANGE_MASK (3 << 4) -#define L3GD20_LOW_ODR_MASK (1 << 0) -#define L3GD20_ODR_PD_MASK (1 << 3) +#define L3GD20_LOW_ODR_MASK BIT(0) +#define L3GD20_ODR_PD_MASK BIT(3) /* Min and Max sampling frequency in mHz */ #define L3GD20_GYRO_MIN_FREQ 12500 |