diff options
author | Aseda Aboagye <aaboagye@google.com> | 2020-08-27 17:23:06 -0700 |
---|---|---|
committer | Commit Bot <commit-bot@chromium.org> | 2020-08-29 00:58:44 +0000 |
commit | 52315edd087c95ba400c90f7964eb11d180d02e0 (patch) | |
tree | 39c0cdea6059aaa07b79e3951be5d64e10925cb0 /driver/charger/sm5803.h | |
parent | 3358403f00abf8f83029145deb9217438c76ee11 (diff) | |
download | chrome-ec-52315edd087c95ba400c90f7964eb11d180d02e0.tar.gz |
sm5803: Configure BFET alerts
The SM5803 has the capability to monitor to the power burnt across the
BFET. There are two thresholds that can be configured: an early
threshold, and a fatal threshold in which the charger automatically
disables the BFET.
This commit configures the BFET alerts to fire at 1.5W for the early
threshold and 6.5W for the fatal threshold.
The full scale is 7.5W, the lsb is 7.5W/256 ~= 29.2mW.
BUG=b:159376384
BRANCH=None
TEST=Build and flash waddledee, charge from sub board, verify that no
alerts are seen.
TEST=Configure the thresholds significantly lower, charge from sub
board, verify that the alerts do fire and logging information is
printed on the EC console.
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Change-Id: I17b3876bc5ed4b41d2378600a8b8bf639f9757ce
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2380404
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Auto-Submit: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: David Schneider <dnschneid@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Commit-Queue: Diana Z <dzigterman@chromium.org>
Diffstat (limited to 'driver/charger/sm5803.h')
-rw-r--r-- | driver/charger/sm5803.h | 19 |
1 files changed, 11 insertions, 8 deletions
diff --git a/driver/charger/sm5803.h b/driver/charger/sm5803.h index 75e4885cbc..7c0eaca78b 100644 --- a/driver/charger/sm5803.h +++ b/driver/charger/sm5803.h @@ -52,14 +52,14 @@ #define SM5803_INT2_VSYS BIT(6) #define SM5803_INT2_TINT BIT(7) -#define SM5803_REG_INT3_REQ 0x07 -#define SM5803_REG_INT3_EN 0x0C -#define SM5803_INT3_GPADC0 BIT(0) -#define SM5803_INT3_VBATC1 BIT(1) -#define SM5803_INT3_VBATC2 BIT(2) -#define SM5803_INT3_SPARE BIT(3) -#define SM5803_INT3_VBUS_PWR_LIMIT BIT(4) -#define SM5803_INT3_IBAT BIT(5) +#define SM5803_REG_INT3_REQ 0x07 +#define SM5803_REG_INT3_EN 0x0C +#define SM5803_INT3_GPADC0 BIT(0) +#define SM5803_INT3_BFET_PWR_LIMIT BIT(1) +#define SM5803_INT3_BFET_PWR_HWSAFE_LIMIT BIT(2) +#define SM5803_INT3_SPARE BIT(3) +#define SM5803_INT3_VBUS_PWR_LIMIT BIT(4) +#define SM5803_INT3_IBAT BIT(5) #define SM5803_REG_INT4_REQ 0x08 #define SM5803_REG_INT4_EN 0x0D @@ -96,6 +96,9 @@ enum sm5803_gpio0_modes { GPIO0_MODE_INPUT }; +#define SM5803_REG_BFET_PWR_MAX_TH 0x35 +#define SM5803_REG_BFET_PWR_HWSAFE_MAX_TH 0x36 + #define SM5803_REG_PORTS_CTRL 0x40 #define SM5803_PORTS_VBUS_DISCH BIT(0) #define SM5803_PORTS_VBUS_PULLDOWN BIT(1) |