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authorDaisuke Nojiri <dnojiri@chromium.org>2017-06-23 17:41:50 -0700
committerchrome-bot <chrome-bot@chromium.org>2017-06-28 21:50:50 -0700
commitde36e33ecf8d7e376d36b68c4be0229d306006ad (patch)
treef9ae3e404cffeb93f30c93abcd35257923c92483 /cts
parent681b6fdf1f3ed049324403da3f6125b0cf21a2df (diff)
downloadchrome-ec-de36e33ecf8d7e376d36b68c4be0229d306006ad.tar.gz
eCTS: Add I2C suite to run_ects.py
This patch adds i2c suite to run_ects.py. It also adds checks for return values from i2c_read and i2c_write functions. BUG=chromium:653183 BRANCH=none TEST=Run run_ects.py and verify all test pass. Change-Id: Ie3d6e1e6f131235e2b28f39e1546c9cb4c3b92f6 Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/547024 Reviewed-by: Randall Spangler <rspangler@chromium.org>
Diffstat (limited to 'cts')
-rw-r--r--cts/i2c/cts.testlist13
-rw-r--r--cts/i2c/cts_i2c.h24
-rw-r--r--cts/i2c/dut.c51
-rw-r--r--cts/i2c/th.c38
4 files changed, 65 insertions, 61 deletions
diff --git a/cts/i2c/cts.testlist b/cts/i2c/cts.testlist
index 809daaa322..7b6461e84d 100644
--- a/cts/i2c/cts.testlist
+++ b/cts/i2c/cts.testlist
@@ -3,12 +3,19 @@
* found in the LICENSE file.
*/
-/* Currently tests will execute in the order they are listed here */
-
-/* Test whether sync completes successfully */
+/*
+ * Test i2c write for 8, 16, and 32 bits. DUT runs as a master and TH
+ * runs as a slave.
+ */
CTS_TEST(write8_test,,,,)
CTS_TEST(write16_test,,,,)
CTS_TEST(write32_test,,,,)
+
+/*
+ * Test i2c read for 8, 16, and 32 bits. DUT runs as a master and TH
+ * runs as a slave. You need external pull-ups (10 kohms) on SDL and SDA
+ * to make read16_test and read32_test pass.
+ */
CTS_TEST(read8_test,,,,)
CTS_TEST(read16_test,,,,)
CTS_TEST(read32_test,,,,) \ No newline at end of file
diff --git a/cts/i2c/cts_i2c.h b/cts/i2c/cts_i2c.h
index 9d287580bf..2914d92a99 100644
--- a/cts/i2c/cts_i2c.h
+++ b/cts/i2c/cts_i2c.h
@@ -4,17 +4,17 @@
*/
enum cts_i2c_packets {
- WRITE_8_OFFSET = 0,
- WRITE_16_OFFSET = 1,
- WRITE_32_OFFSET = 2,
- READ_8_OFFSET = 3,
- READ_16_OFFSET = 4,
- READ_32_OFFSET = 5,
+ WRITE8_OFF,
+ WRITE16_OFF,
+ WRITE32_OFF,
+ READ8_OFF,
+ READ16_OFF,
+ READ32_OFF,
};
-#define WRITE_8_DATA 0x42
-#define WRITE_16_DATA 0x1234
-#define WRITE_32_DATA 0xDEADBEEF
-#define READ_8_DATA 0x23
-#define READ_16_DATA 0xACED
-#define READ_32_DATA 0x01ABCDEF
+#define WRITE8_DATA 0x42
+#define WRITE16_DATA 0x1234
+#define WRITE32_DATA 0xDEADBEEF
+#define READ8_DATA 0x23
+#define READ16_DATA 0xACED
+#define READ32_DATA 0x01ABCDEF
diff --git a/cts/i2c/dut.c b/cts/i2c/dut.c
index 98805a4fc2..e4a87f440e 100644
--- a/cts/i2c/dut.c
+++ b/cts/i2c/dut.c
@@ -17,66 +17,63 @@
enum cts_rc write8_test(void)
{
- int port = i2c_ports[0].port;
-
- i2c_write8(port, TH_ADDR, WRITE_8_OFFSET, WRITE_8_DATA);
-
+ if (i2c_write8(i2c_ports[0].port, TH_ADDR, WRITE8_OFF, WRITE8_DATA))
+ return CTS_RC_FAILURE;
return CTS_RC_SUCCESS;
}
enum cts_rc write16_test(void)
{
- int port = i2c_ports[0].port;
-
- i2c_write16(port, TH_ADDR, WRITE_16_OFFSET, WRITE_16_DATA);
-
+ if (i2c_write16(i2c_ports[0].port, TH_ADDR, WRITE16_OFF, WRITE16_DATA))
+ return CTS_RC_FAILURE;
return CTS_RC_SUCCESS;
}
enum cts_rc write32_test(void)
{
- int port = i2c_ports[0].port;
-
- i2c_write32(port, TH_ADDR, WRITE_32_OFFSET, WRITE_32_DATA);
-
+ if (i2c_write32(i2c_ports[0].port, TH_ADDR, WRITE32_OFF, WRITE32_DATA))
+ return CTS_RC_FAILURE;
return CTS_RC_SUCCESS;
}
enum cts_rc read8_test(void)
{
- int result;
- int port = i2c_ports[0].port;
-
- i2c_read8(port, TH_ADDR, READ_8_OFFSET, &result);
+ int data;
- if (result != READ_8_DATA)
+ if (i2c_read8(i2c_ports[0].port, TH_ADDR, READ8_OFF, &data))
return CTS_RC_FAILURE;
+ if (data != READ8_DATA) {
+ CPRINTL("Expecting 0x%x but read 0x%x", READ8_DATA, data);
+ return CTS_RC_FAILURE;
+ }
return CTS_RC_SUCCESS;
}
enum cts_rc read16_test(void)
{
- int result;
- int port = i2c_ports[0].port;
-
- i2c_read16(port, TH_ADDR, READ_16_OFFSET, &result);
+ int data;
- if (result != READ_16_DATA)
+ if (i2c_read16(i2c_ports[0].port, TH_ADDR, READ16_OFF, &data))
return CTS_RC_FAILURE;
+ if (data != READ16_DATA) {
+ CPRINTL("Expecting 0x%x but read 0x%x", READ16_DATA, data);
+ return CTS_RC_FAILURE;
+ }
return CTS_RC_SUCCESS;
}
enum cts_rc read32_test(void)
{
- int result;
- int port = i2c_ports[0].port;
-
- i2c_read32(port, TH_ADDR, READ_32_OFFSET, &result);
+ int data;
- if (result != READ_32_DATA)
+ if (i2c_read32(i2c_ports[0].port, TH_ADDR, READ32_OFF, &data))
+ return CTS_RC_FAILURE;
+ if (data != READ32_DATA) {
+ CPRINTL("Read 0x%x expecting 0x%x", data, READ32_DATA);
return CTS_RC_FAILURE;
+ }
return CTS_RC_SUCCESS;
}
diff --git a/cts/i2c/th.c b/cts/i2c/th.c
index 17ed64b9f5..78035cb1b2 100644
--- a/cts/i2c/th.c
+++ b/cts/i2c/th.c
@@ -27,18 +27,18 @@ void i2c_data_received(int port, uint8_t *buf, int len)
int i2c_set_response(int port, uint8_t *buf, int len)
{
switch (buf[0]) {
- case READ_8_OFFSET:
- buf[0] = READ_8_DATA;
+ case READ8_OFF:
+ buf[0] = READ8_DATA;
return 1;
- case READ_16_OFFSET:
- buf[0] = READ_16_DATA & 0xFF;
- buf[1] = (READ_16_DATA >> 8) & 0xFF;
+ case READ16_OFF:
+ buf[0] = READ16_DATA & 0xFF;
+ buf[1] = (READ16_DATA >> 8) & 0xFF;
return 2;
- case READ_32_OFFSET:
- buf[0] = READ_32_DATA & 0xFF;
- buf[1] = (READ_32_DATA >> 8) & 0xFF;
- buf[2] = (READ_32_DATA >> 16) & 0xFF;
- buf[3] = (READ_32_DATA >> 24) & 0xFF;
+ case READ32_OFF:
+ buf[0] = READ32_DATA & 0xFF;
+ buf[1] = (READ32_DATA >> 8) & 0xFF;
+ buf[2] = (READ32_DATA >> 16) & 0xFF;
+ buf[3] = (READ32_DATA >> 24) & 0xFF;
return 4;
default:
return 0;
@@ -73,10 +73,10 @@ enum cts_rc write8_test(void)
if (wait_for_in_flag(100))
return CTS_RC_TIMEOUT;
- if (inbox[0] != WRITE_8_OFFSET)
+ if (inbox[0] != WRITE8_OFF)
return CTS_RC_FAILURE;
in = inbox[1];
- if (in != WRITE_8_DATA)
+ if (in != WRITE8_DATA)
return CTS_RC_FAILURE;
return CTS_RC_SUCCESS;
@@ -88,10 +88,10 @@ enum cts_rc write16_test(void)
if (wait_for_in_flag(100))
return CTS_RC_TIMEOUT;
- if (inbox[0] != WRITE_16_OFFSET)
+ if (inbox[0] != WRITE16_OFF)
return CTS_RC_FAILURE;
in = inbox[2] << 8 | inbox[1] << 0;
- if (in != WRITE_16_DATA)
+ if (in != WRITE16_DATA)
return CTS_RC_FAILURE;
return CTS_RC_SUCCESS;
@@ -103,10 +103,10 @@ enum cts_rc write32_test(void)
if (wait_for_in_flag(100))
return CTS_RC_TIMEOUT;
- if (inbox[0] != WRITE_32_OFFSET)
+ if (inbox[0] != WRITE32_OFF)
return CTS_RC_FAILURE;
in = inbox[4] << 24 | inbox[3] << 16 | inbox[2] << 8 | inbox[1];
- if (in != WRITE_32_DATA)
+ if (in != WRITE32_DATA)
return CTS_RC_FAILURE;
return CTS_RC_SUCCESS;
@@ -116,7 +116,7 @@ enum cts_rc read8_test(void)
{
if (wait_for_in_flag(100))
return CTS_RC_TIMEOUT;
- if (inbox[0] != READ_8_OFFSET)
+ if (inbox[0] != READ8_OFF)
return CTS_RC_FAILURE;
return CTS_RC_SUCCESS;
@@ -126,7 +126,7 @@ enum cts_rc read16_test(void)
{
if (wait_for_in_flag(100))
return CTS_RC_TIMEOUT;
- if (inbox[0] != READ_16_OFFSET)
+ if (inbox[0] != READ16_OFF)
return CTS_RC_FAILURE;
return CTS_RC_SUCCESS;
@@ -136,7 +136,7 @@ enum cts_rc read32_test(void)
{
if (wait_for_in_flag(100))
return CTS_RC_TIMEOUT;
- if (inbox[0] != READ_32_OFFSET)
+ if (inbox[0] != READ32_OFF)
return CTS_RC_FAILURE;
return CTS_RC_SUCCESS;