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authorDino Li <Dino.Li@ite.com.tw>2018-05-24 10:30:19 +0800
committerchrome-bot <chrome-bot@chromium.org>2018-05-28 00:53:29 -0700
commitcadc0f2513cb40a52ae70f66b34ff9f6abaa2250 (patch)
treed2c2c83359eb5cb1bb6033c681296ca0081244cc /core
parent2352723c9f6fa21455e4796db5ca955605aa314f (diff)
downloadchrome-ec-cadc0f2513cb40a52ae70f66b34ff9f6abaa2250.tar.gz
it83xx: system: print out message if reset cause is unknown
The message will indicate the reset is caused by which program address of jump and link instruction. BRANCH=None BUG=b:79706847 TEST=No error message under these tests: cold reset, soft reset, and sysjump. On bip, declare ".get_cc = NULL" for it83xx tcpm driver. And get the following message. log: --- UART initialized after reboot --- [Reset cause: unknown] ... ===Unknown reset! jump from f824 or f826=== [0.004504 low power idle task started] ... Disassembly: 0000f814 <tcpm_get_cc>: f814: fc 00 push25 $r6, #0 ! {$r6, $fp, $gp, $lp} f816: 46 30 00 17 sethi $r3, #0x17 f81a: 58 31 8a cc ori $r3, $r3, #0xacc f81e: 95 04 slli333 $r4, $r0, #4 f820: 88 64 add45 $r3, $r4 f822: a0 da lwi333 $r3, [$r3 + #8] f824: a0 da lwi333 $r3, [$r3 + #8] f826: dd 23 jral5 $r3 f828: fc 80 pop25 $r6, #0 ! {$r6, $fp, $gp, $lp} Change-Id: I2eaf2ad95eb92c68ce6f8240ea6ec90ac2b4a5c9 Signed-off-by: Dino Li <Dino.Li@ite.com.tw> Reviewed-on: https://chromium-review.googlesource.com/1070387 Reviewed-by: Jett Rink <jettrink@chromium.org>
Diffstat (limited to 'core')
-rw-r--r--core/nds32/cpu.h1
-rw-r--r--core/nds32/init.S9
-rw-r--r--core/nds32/task.c3
3 files changed, 13 insertions, 0 deletions
diff --git a/core/nds32/cpu.h b/core/nds32/cpu.h
index dcf668bd24..f5e4353cc3 100644
--- a/core/nds32/cpu.h
+++ b/core/nds32/cpu.h
@@ -55,5 +55,6 @@ static inline uint32_t get_itype(void)
void cpu_init(void);
extern uint32_t ilp;
+extern uint32_t ec_reset_lp;
#endif /* __CROS_EC_CPU_H */
diff --git a/core/nds32/init.S b/core/nds32/init.S
index 4db057dd91..1df5ae79ae 100644
--- a/core/nds32/init.S
+++ b/core/nds32/init.S
@@ -119,6 +119,12 @@ reset:
/* Set system stack pointer. */
la $sp, stack_end
+ /*
+ * move content of lp into r5 and then store the content
+ * into variable "ec_reset_lp" later after memory initialization.
+ */
+ mov55 $r5, $lp
+
/* map/enable the 16kB of DLM at 0x00080000 */
li $r0, 0x00080005
mtsr $r0, $mr7
@@ -163,6 +169,9 @@ data_loop:
swi.bi $r3, [$r1], 4
bne $r1, $r2, data_loop
+ /* store the content of r5 (lp after reset) into "ec_reset_lp" */
+ swi.gp $r5, [ + ec_reset_lp]
+
/* we switch to our own exception vectors */
/* go back to it level 0 with HW interrupts globally disabled */
li $r4, 0x70008
diff --git a/core/nds32/task.c b/core/nds32/task.c
index 9a77114651..f713c52442 100644
--- a/core/nds32/task.c
+++ b/core/nds32/task.c
@@ -180,6 +180,9 @@ int cpu_int_entry_number;
*/
uint32_t ilp;
+/* This variable is used to save link pointer register at EC reset. */
+uint32_t ec_reset_lp;
+
static inline task_ *__task_id_to_ptr(task_id_t id)
{
return tasks + id;