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authorKeith Short <keithshort@chromium.org>2020-07-22 15:41:01 -0600
committerCommit Bot <commit-bot@chromium.org>2020-09-24 02:19:03 +0000
commitedb0754545e0d0a4c0f4615671910f78c51e37d0 (patch)
treeaa97a1a09e823758213c016bc607172eb37614c4 /core
parentdda108fd4a55564ba657d9d26f782e9ff788f6b2 (diff)
downloadchrome-ec-edb0754545e0d0a4c0f4615671910f78c51e37d0.tar.gz
cortex-m: support locating .data section in ROM resident
Reorganize the RO and RW images so the .data section remains in flash and is not copied into code RAM by the bootloader. This frees effective flash space for more code in the .text and .rodata sections. The EC initialization is changed to copy the .data section directly from flash into data RAM so the runtime access of objects linked into .data are unchanged. This is controlled with a new config option CONFIG_CHIP_DATA_IN_INIT_ROM. This option is automatically enabled when the board enables the ROM resident section with CONFIG_CHIP_INIT_ROM_REGION and the EC chip supports memory mapped access to flash (CONFIG_MAPPED_STORAGE). On Volteer this change saves 1656 bytes of RW flash space. BUG=none BRANCH=none TEST=make buildall TEST=Run "ectool motionsense lid_angle" on Volteer. Signed-off-by: Keith Short <keithshort@chromium.org> Change-Id: I2eff814ad240dfb46bfba400b83d78d1f69a8310 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2325768 Reviewed-by: caveh jalali <caveh@chromium.org>
Diffstat (limited to 'core')
-rw-r--r--core/cortex-m/ec.lds.S59
-rw-r--r--core/cortex-m/init.S14
2 files changed, 64 insertions, 9 deletions
diff --git a/core/cortex-m/ec.lds.S b/core/cortex-m/ec.lds.S
index aa3e7f3bfc..dede2bd3d1 100644
--- a/core/cortex-m/ec.lds.S
+++ b/core/cortex-m/ec.lds.S
@@ -124,7 +124,12 @@ MEMORY
#else
#define EC_IMAGE_VMA_MEM_REGION FLASH
#endif
- #define DATA_LMA_MEM_REGION FLASH
+
+ #ifdef CONFIG_CHIP_DATA_IN_INIT_ROM
+ #define DATA_LMA_MEM_REGION ROM_RESIDENT
+ #else
+ #define DATA_LMA_MEM_REGION FLASH
+ #endif
#endif
SECTIONS
@@ -344,7 +349,13 @@ SECTIONS
. = ALIGN(4);
} > EC_IMAGE_VMA_MEM_REGION AT > EC_IMAGE_LMA_MEM_REGION
+#ifdef CONFIG_CHIP_DATA_IN_INIT_ROM
+ __data_lma_start = ORIGIN(ROM_RESIDENT_VMA);
+ #define INIT_ROM_LMA (ORIGIN(ROM_RESIDENT_VMA) + SIZEOF(.data))
+#else
__data_lma_start = .;
+ #define INIT_ROM_LMA ORIGIN(ROM_RESIDENT_VMA)
+#endif
#ifdef CONFIG_PRESERVE_LOGS
.preserve_logs(NOLOAD) : {
@@ -465,13 +476,25 @@ SECTIONS
__ram_free = (CONFIG_RAM_BASE + CONFIG_RAM_SIZE) -
(__shared_mem_buf + CONFIG_SHAREDMEM_MINIMUM_SIZE);
+#ifdef CONFIG_CHIP_DATA_IN_INIT_ROM
+ /*
+ * .data is ROM resident, last section in the EC image is the .rodata
+ * section.
+ */
+ #define FLASH_USED_END (LOADADDR(.rodata) + SIZEOF(.rodata))
+#else
+ /*
+ * .data is included in the EC image and copied to RAM by the loader.
+ */
+ #define FLASH_USED_END (LOADADDR(.data) + SIZEOF(.data))
+#endif
+
/*
* __flash_used is used in flash free calculations by the makefile.
* __image_size is stored in the struct image_data header and used
* in hash calcuations.
*/
- __flash_used = LOADADDR(.data) + SIZEOF(.data) -
- ORIGIN(EC_IMAGE_LMA_MEM_REGION);
+ __flash_used = FLASH_USED_END - ORIGIN(EC_IMAGE_LMA_MEM_REGION);
__image_size = __flash_used;
#ifdef CONFIG_FLASH
@@ -516,6 +539,24 @@ SECTIONS
* The loader code copies the .text, .rodata, and .data sections into
* the code RAM of the EC. The .header and .init_rom sections are not
* copied by the loader.
+ *
+ * Image layout when ROM_RESIDENT region is used, and
+ * CONFIG_CHIP_DATA_IN_INIT_ROM is enabled.
+ *
+ * EC image layout (LMA) VMA
+ * .header (if RO image) none
+ * .text code RAM
+ * .rodata code RAM + .text size
+ * .fill none
+ * .data data RAM
+ * .init_rom flash offset
+ *
+ * The loader code copies the .text and .rodata sections into the code
+ * RAM of the EC. The .header, .data, and .init_rom sections are not
+ * copied by the loader.
+ *
+ * EC initialization code copies the .data directly from flash to
+ * data RAM at runtime.
*/
/*
@@ -525,7 +566,7 @@ SECTIONS
ASSERT((ORIGIN(FLASH) + LENGTH(FLASH)) == ORIGIN(ROM_RESIDENT),
".init_rom section must follow the flash section")
- .init_rom : {
+ .init_rom INIT_ROM_LMA : {
. = ALIGN(4);
__init_rom_start = .;
*(.init.rom)
@@ -537,7 +578,7 @@ SECTIONS
* flash as the FLASH section. Fill the space between.
*/
.fill : {
- . = LOADADDR(.data) + SIZEOF(.data);
+ . = FLASH_USED_END;
. = ALIGN(4);
__fill_start = .;
FILL(0xFF);
@@ -548,11 +589,11 @@ SECTIONS
} > FLASH
/*
- * The end of the .fill region should also be the start of the
- * .init_rom region
+ * The end of the .fill region should also be the start of the ROM
+ * resident region.
*/
- ASSERT(__fill_end == LOADADDR(.init_rom),
- ".fill region end not aligned to start of .init_rom")
+ ASSERT(__fill_end == ORIGIN(ROM_RESIDENT),
+ ".fill region end not aligned to start of ROM_RESIDENT region")
/*
* __image_size is used for hash calculation. When
diff --git a/core/cortex-m/init.S b/core/cortex-m/init.S
index 19b98b0afb..bc650c4c64 100644
--- a/core/cortex-m/init.S
+++ b/core/cortex-m/init.S
@@ -43,6 +43,20 @@ bss_loop:
/* Copy initialized data to Internal RAM */
ldr r0,_data_lma_start
+
+ /*
+ * When the .data section is linked into the .init_rom section,
+ * _data_lma_start is defined as a flash offset instead of a full
+ * 32-bit address by the linker script. Add the 32-bit flash base
+ * address to get a full 32-bit address.
+ *
+ * Flash locking isn't needed here as no tasks have been started.
+ */
+#ifdef CONFIG_CHIP_DATA_IN_INIT_ROM
+ ldr r1, =CONFIG_MAPPED_STORAGE_BASE
+ add r0, r0, r1
+#endif
+
ldr r1,_data_start
ldr r2,_data_end
data_loop: