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authorMulin Chao <mlchao@nuvoton.com>2016-09-07 10:49:50 +0800
committerchrome-bot <chrome-bot@chromium.org>2016-09-15 16:16:22 -0700
commita4c2b141f80777bf089f35dabe8e355a0e639a92 (patch)
treed028dbd2df3ec2a66673c82bfc25862d5c35da58 /core
parentf48b781dea0593f153715fc3c08a8dcf50236360 (diff)
downloadchrome-ec-a4c2b141f80777bf089f35dabe8e355a0e639a92.tar.gz
npcx: Fixed bug that api utility in ROM doesn't enable burst mode.
We found the api utility in ROM doesn't enable burst mode of GDMA. It influences the performance of FW download a lot. The CL modified GDMA for moving the code of the other region from flash to ram. And move a function that kicks off GMDA transactions to suspend ram in case this utility is erased by itself. This issue will be fixed in our next generation. Modified sources: 1. system.c: Implement GDMA bypass. 2. system_chip.h: Import flash addresses for GDMA bypass code. 3. registers.h: Add GDMA register definitions. 4. cortex-m/ec.lds.S: Add lowpower_ram2 section in linker script. BRANCH=none BUG=chrome-os-partner:56794 TEST=make BOARD=npcx_evb; test sysjump and measure download time Change-Id: I8490f8f2e5a8cdcb6fd10511878c4a4af8073bbf Signed-off-by: Mulin Chao <mlchao@nuvoton.com> Reviewed-on: https://chromium-review.googlesource.com/381779 Commit-Ready: Shawn N <shawnn@chromium.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'core')
-rw-r--r--core/cortex-m/ec.lds.S7
1 files changed, 6 insertions, 1 deletions
diff --git a/core/cortex-m/ec.lds.S b/core/cortex-m/ec.lds.S
index 97458f8a13..2b70535fa6 100644
--- a/core/cortex-m/ec.lds.S
+++ b/core/cortex-m/ec.lds.S
@@ -93,8 +93,13 @@ SECTIONS
__flash_lpfw_start = .;
/* Entering deep idle FW for better power consumption */
KEEP(*(.lowpower_ram))
- . = ALIGN(4);
+ . = ALIGN(4);
__flash_lpfw_end = .;
+ __flash_lplfw_start = .;
+ /* GDMA utilities for better FW download speed */
+ KEEP(*(.lowpower_ram2))
+ . = ALIGN(4);
+ __flash_lplfw_end = .;
} > CDRAM AT > FLASH
#else
} > FLASH