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| author | Mary Ruthven <mruthven@chromium.org> | 2021-11-09 14:35:05 -0600 |
|---|---|---|
| committer | Commit Bot <commit-bot@chromium.org> | 2021-11-18 04:48:44 +0000 |
| commit | 1eb3748511e93e0945f636930f3f20e108f95f23 (patch) | |
| tree | 8a43a39a65f0e5d58340badab06d197c6a90e480 /core | |
| parent | d799d6f54cf7106f4d2d30faff3059b1c061aa4a (diff) | |
| download | chrome-ec-1eb3748511e93e0945f636930f3f20e108f95f23.tar.gz | |
Revert "mt_scp: Support ROM section on internal SRAM."
This reverts commit 4a2a450ca48278b9f701461799df54faa6c4c395.
Merge conflict in core/cortex-m/ec.lds.S
BUG=b:200823466
TEST=make buildall -j
Change-Id: I52ae029a574aadc4de96f8e9d68076d9bea03ae5
Signed-off-by: Mary Ruthven <mruthven@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3273393
Reviewed-by: Vadim Sukhomlinov <sukhomlinov@chromium.org>
Diffstat (limited to 'core')
| -rw-r--r-- | core/cortex-m/ec.lds.S | 24 |
1 files changed, 20 insertions, 4 deletions
diff --git a/core/cortex-m/ec.lds.S b/core/cortex-m/ec.lds.S index 5d6bdb09a7..b4dd439b9e 100644 --- a/core/cortex-m/ec.lds.S +++ b/core/cortex-m/ec.lds.S @@ -30,7 +30,7 @@ ENTRY(reset) MEMORY { #if !defined(CONFIG_FLASH_PHYSICAL) - IROM (rx) : ORIGIN = CONFIG_ROM_BASE, LENGTH = CONFIG_ROM_SIZE + IRAM (rwx) : ORIGIN = CONFIG_RAM_BASE, LENGTH = CONFIG_RAM_SIZE #else #if defined(SECTION_IS_RO) && defined(NPCX_RO_HEADER) /* @@ -49,8 +49,8 @@ MEMORY SHARED_LIB (rx) : ORIGIN = FW_OFF(SHAREDLIB), \ LENGTH = FW_SIZE(SHAREDLIB) #endif + IRAM (rw) : ORIGIN = CONFIG_RAM_BASE, LENGTH = CONFIG_RAM_SIZE #endif /* !CONFIG_FLASH_PHYSICAL */ - IRAM (rw) : ORIGIN = CONFIG_RAM_BASE, LENGTH = CONFIG_RAM_SIZE #ifdef CONFIG_EXTERNAL_STORAGE CDRAM (rx) : \ @@ -150,7 +150,7 @@ SECTIONS } > CDRAM AT > FLASH #else #if !defined(CONFIG_FLASH_PHYSICAL) - } > IROM + } > IRAM #else } > FLASH #endif /* !CONFIG_FLASH_PHYSICAL */ @@ -297,7 +297,7 @@ SECTIONS . = ALIGN(4); #if !defined(CONFIG_FLASH_PHYSICAL) - } > IROM + } > IRAM #define DATA_LMA_MEM_REGION IROM #elif defined(CONFIG_EXTERNAL_STORAGE) } > CDRAM AT > FLASH @@ -309,7 +309,23 @@ SECTIONS __data_lma_start = .; +#if !defined(CONFIG_FLASH_PHYSICAL) + /* + * Make a space for .data section's LMA. Otherwise, ld won't preserve + * a space for .data if .rodata and .bss sections are both in IRAM. + */ +#if defined(__clang__) + /* + * The lazy evaluation timing of symbols and builtin functions of ld and + * lld are different. + */ + .bss __data_lma_start + SIZEOF(.data) : { +#else + .bss __data_lma_start + __data_end - __data_start : { +#endif /* __clang__ */ +#else .bss : { +#endif /* !CONFIG_FLASH_PHYSICAL */ /* * Align to 512 bytes. This is convenient when some memory block * needs big alignment. This is the beginning of the RAM, |