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| author | Simon Glass <sjg@chromium.org> | 2012-06-03 10:45:09 -0700 |
|---|---|---|
| committer | Gerrit <chrome-bot@google.com> | 2012-06-21 06:01:22 -0700 |
| commit | d5cb02614225fc6f50b2fa806b1bb07a4c571008 (patch) | |
| tree | 20af4aabb58848aef5c8426efd87cf93fc989775 /core/cortex-m | |
| parent | 80fa2da908d4f03b6f1bdf4da5876aff20af88cb (diff) | |
| download | chrome-ec-d5cb02614225fc6f50b2fa806b1bb07a4c571008.tar.gz | |
Enable checking for divide by 0 and alignment faults
These likely indicate errors, so we shold trap them. Possibly this
should be reconsidered for production.
BUG=chrome-os-partner:10148
TEST=manual:
build on all boards
build and boot on snow with a special rw command containing a division
by 0. See that it is trapped:
> rw 0
=== EXCEPTION: 03 ====== xPSR: 01000000 ===========
r0 :0000000b r1 :08005eba r2 :00000000 r3 :20001048
r4 :00000000 r5 :08004fd4 r6 :08004f8c r7 :200012a8
r8 :08004fd4 r9 :00000002 r10:00000000 r11:00000000
r12:00000000 sp :200009a0 lr :08002861 pc :0800368a
Divide by 0, Forced hard fault, Vector catch
mmfs = 02000000, shcsr = 00000000, hfsr = 40000000, dfsr = 00000008
Turn off the cpu_init() setup, and see that it is ignored.
> rw 0
read 0x0 = 0x00000000
>
Similarly, try an unaligned access with the rw command with this enabled:
> rw 1
=== EXCEPTION: 03 ====== xPSR: 01000000 ===========
r0 :0000000b r1 :00000041 r2 :00000001 r3 :200012ac
r4 :00000000 r5 :08004fd4 r6 :08004f8c r7 :200012a8
r8 :08004fd4 r9 :00000002 r10:00000000 r11:00000000
r12:00000000 sp :200009a0 lr :08002861 pc :08003686
Unaligned, Forced hard fault, Vector catch
mmfs = 01000000, shcsr = 00000000, hfsr = 40000000, dfsr = 00000008
but disabled it works:
> rw 1
read 0x1 = 0x5d200010
>
Change-Id: Id84f737301e467b3b56a7ac22790e55d672df7d8
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/25410
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Diffstat (limited to 'core/cortex-m')
| -rw-r--r-- | core/cortex-m/build.mk | 2 | ||||
| -rw-r--r-- | core/cortex-m/cpu.c | 15 | ||||
| -rw-r--r-- | core/cortex-m/cpu.h | 3 |
3 files changed, 19 insertions, 1 deletions
diff --git a/core/cortex-m/build.mk b/core/cortex-m/build.mk index 65d3b06551..7a2f16e4e9 100644 --- a/core/cortex-m/build.mk +++ b/core/cortex-m/build.mk @@ -13,6 +13,6 @@ CFLAGS_FPU-$(CONFIG_FPU)=-mfpu=fpv4-sp-d16 -mfloat-abi=hard CFLAGS_CPU=-mcpu=cortex-m4 -mthumb -Os -mno-sched-prolog CFLAGS_CPU+=$(CFLAGS_FPU-y) -core-y=init.o panic.o switch.o task.o timer.o +core-y=cpu.o init.o panic.o switch.o task.o timer.o core-$(CONFIG_FPU)+=fpu.o core-$(CONFIG_TASK_WATCHDOG)+=watchdog.o diff --git a/core/cortex-m/cpu.c b/core/cortex-m/cpu.c new file mode 100644 index 0000000000..cae74b2cd4 --- /dev/null +++ b/core/cortex-m/cpu.c @@ -0,0 +1,15 @@ +/* Copyright (c) 2012 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + * + * Set up the Cortex-M core + */ + +#include "cpu.h" + + +void cpu_init(void) +{ + /* Catch divide by 0 and unaligned access */ + CPU_NVIC_CCR |= CPU_NVIC_CCR_DIV_0_TRAP | CPU_NVIC_CCR_UNALIGN_TRAP; +} diff --git a/core/cortex-m/cpu.h b/core/cortex-m/cpu.h index 2e75d6c1c5..f84a1fdfb0 100644 --- a/core/cortex-m/cpu.h +++ b/core/cortex-m/cpu.h @@ -43,4 +43,7 @@ enum { CPU_NVIC_HFSR_VECTTBL = 1 << 1, }; +/* Set up the cpu to detect faults */ +void cpu_init(void); + #endif /* __CPU_H */ |