diff options
author | Deepti Deshatty <deepti.deshatty@intel.corp-partner.google.com> | 2022-02-20 20:03:45 +0530 |
---|---|---|
committer | Commit Bot <commit-bot@chromium.org> | 2022-03-09 18:47:00 +0000 |
commit | 2bbc75a90ed131a79cc3313bd5b54b44cd727380 (patch) | |
tree | fc26c962a75204963ed8aa223bcee9e9ce853b7b /common | |
parent | 5e2e973b4ef0cf02596bdfc5fa81e7f4e704f446 (diff) | |
download | chrome-ec-2bbc75a90ed131a79cc3313bd5b54b44cd727380.tar.gz |
usbc: define CONFIG_AP_PWRSEQ in usbc common files
Enable code implemented under HAS_TASK_CHIPSET in usbc
common files for the platforms which defines CONFIG_AP_PWRSEQ.
This change helps in USB Pd enumeration of bus powered
devices.
BUG=b:219891340
BRANCH=None
TEST=Nivviks build is successful.
Change-Id: If9ea1c5282ceefee5f4031dae06534aea9a55648
Signed-off-by: Deepti Deshatty <deepti.deshatty@intel.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3476654
Reviewed-by: Andrew McRae <amcrae@google.com>
Diffstat (limited to 'common')
-rw-r--r-- | common/usb_pd_alt_mode_dfp.c | 2 | ||||
-rw-r--r-- | common/usbc/usb_pd_dpm.c | 2 | ||||
-rw-r--r-- | common/usbc/usb_tc_drp_acc_trysrc_sm.c | 4 |
3 files changed, 4 insertions, 4 deletions
diff --git a/common/usb_pd_alt_mode_dfp.c b/common/usb_pd_alt_mode_dfp.c index c15060769d..cbf2d6bdf9 100644 --- a/common/usb_pd_alt_mode_dfp.c +++ b/common/usb_pd_alt_mode_dfp.c @@ -1172,7 +1172,7 @@ __overridable int svdm_enter_dp_mode(int port, uint32_t mode_caps) * could cause a wake up.) When in S5->S3 transition state, we * should treat it as a SoC off state. */ -#ifdef HAS_TASK_CHIPSET +#if defined(HAS_TASK_CHIPSET) || defined(CONFIG_AP_PWRSEQ) if (!chipset_in_state(CHIPSET_STATE_ANY_SUSPEND | CHIPSET_STATE_ON)) return -1; #endif diff --git a/common/usbc/usb_pd_dpm.c b/common/usbc/usb_pd_dpm.c index bd5706ba98..a4829fdaee 100644 --- a/common/usbc/usb_pd_dpm.c +++ b/common/usbc/usb_pd_dpm.c @@ -271,7 +271,7 @@ static void dpm_attempt_mode_entry(int port) return; } -#ifdef HAS_TASK_CHIPSET +#if defined(HAS_TASK_CHIPSET) || defined(CONFIG_AP_PWRSEQ) /* * Do not try to enter mode while CPU is off. * CPU transitions (e.g b/158634281) can occur during the discovery diff --git a/common/usbc/usb_tc_drp_acc_trysrc_sm.c b/common/usbc/usb_tc_drp_acc_trysrc_sm.c index 3fe9871bdd..f0459dec7c 100644 --- a/common/usbc/usb_tc_drp_acc_trysrc_sm.c +++ b/common/usbc/usb_tc_drp_acc_trysrc_sm.c @@ -546,7 +546,7 @@ int pd_get_rev(int port, enum tcpci_msg_type type) #endif /* !CONFIG_USB_PR_SM */ -#ifndef HAS_TASK_CHIPSET +#if !defined(HAS_TASK_CHIPSET) && !defined(CONFIG_AP_PWRSEQ) __overridable enum pd_dual_role_states board_tc_get_initial_drp_mode(int port) { /* @@ -1571,7 +1571,7 @@ void tc_state_init(int port) */ tc_policy_pd_enable(port, pd_comm_allowed_by_policy()); -#ifdef HAS_TASK_CHIPSET +#if defined(HAS_TASK_CHIPSET) || defined(CONFIG_AP_PWRSEQ) /* Set dual-role state based on chipset power state */ if (chipset_in_state(CHIPSET_STATE_ANY_OFF)) pd_set_dual_role_and_event(port, PD_DRP_FORCE_SINK, 0); |