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authorDiana Z <dzigterman@chromium.org>2021-07-13 16:52:11 -0600
committerCommit Bot <commit-bot@chromium.org>2021-07-27 16:19:04 +0000
commit7d827bd265bce19064198ea5866b5db16f3307d6 (patch)
tree9c3d946973adfc6cb8fcc1728191ef9564f2ea2a /common/usbc/usb_pe_drp_sm.c
parent26a7501ac9ad05c920ec37f3cb55212f55fa0a9d (diff)
downloadchrome-ec-7d827bd265bce19064198ea5866b5db16f3307d6.tar.gz
TCPMv2: Allow tests to clear PE data between runs
The PE stores internal state (ex. capabilities, identity responses) which should be cleared out between unit test runs. BRANCH=None BUG=None TEST=make -j buildall Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: I77b3faefd3f887a68ca9593a7398ae9c3ffb2f17 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3025864 Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
Diffstat (limited to 'common/usbc/usb_pe_drp_sm.c')
-rw-r--r--common/usbc/usb_pe_drp_sm.c22
1 files changed, 18 insertions, 4 deletions
diff --git a/common/usbc/usb_pe_drp_sm.c b/common/usbc/usb_pe_drp_sm.c
index 0230e0bbb2..9d0522f7ff 100644
--- a/common/usbc/usb_pe_drp_sm.c
+++ b/common/usbc/usb_pe_drp_sm.c
@@ -926,7 +926,8 @@ static void pe_set_frs_enable(int port, int enable)
int current = PE_CHK_FLAG(port, PE_FLAGS_FAST_ROLE_SWAP_ENABLED);
/* This should only be called from the PD task */
- assert(port == TASK_ID_TO_PD_PORT(task_get_current()));
+ if (!IS_ENABLED(TEST_BUILD))
+ assert(port == TASK_ID_TO_PD_PORT(task_get_current()));
if (!IS_ENABLED(CONFIG_USB_PD_FRS) || !IS_ENABLED(CONFIG_USB_PD_REV30))
return;
@@ -1339,10 +1340,16 @@ void pd_send_vdm(int port, uint32_t vid, int cmd, const uint32_t *data,
task_wake(PD_PORT_TO_TASK_ID(port));
}
-static void pe_handle_detach(void)
+#ifdef TEST_BUILD
+/*
+ * Allow unit tests to access this function to clear internal state data between
+ * runs
+ */
+void pe_clear_port_data(int port)
+#else
+static void pe_clear_port_data(int port)
+#endif /* TEST_BUILD */
{
- const int port = TASK_ID_TO_PD_PORT(task_get_current());
-
/*
* PD 3.0 Section 8.3.3.3.8
* Note: The HardResetCounter is reset on a power cycle or Detach.
@@ -1370,6 +1377,13 @@ static void pe_handle_detach(void)
/* Exit BIST Test mode, in case the TCPC entered it. */
tcpc_set_bist_test_mode(port, false);
}
+
+static void pe_handle_detach(void)
+{
+ const int port = TASK_ID_TO_PD_PORT(task_get_current());
+
+ pe_clear_port_data(port);
+}
DECLARE_HOOK(HOOK_USB_PD_DISCONNECT, pe_handle_detach, HOOK_PRIO_DEFAULT);
#ifdef CONFIG_USB_PD_RESET_MIN_BATT_SOC