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authorGwendal Grignou <gwendal@chromium.org>2015-07-30 15:37:11 -0700
committerchrome-bot <chrome-bot@chromium.org>2015-09-23 21:26:22 -0700
commitdac76cc8d053d592202e5caf6ccff03e78b1c43d (patch)
tree0c123130ca9f6ef623312a392654fb114c7de885 /common/spi_commands.c
parent4ae115e145fb080f363dda74a09ff1c5ad3044ca (diff)
downloadchrome-ec-dac76cc8d053d592202e5caf6ccff03e78b1c43d.tar.gz
common: add command spixfer
Similar to i2c_xfer: allow access to a SPI device registers. We assume the protocol use is set MSB bit to the offset for read operation. id is the index of the device in spi_devices. BRANCH=smaug TEST=Read/Write SPI registers. BUG=none Change-Id: Id4aaffbb6f514fd47086aee240b556ea23298d33 Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/289857 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Diffstat (limited to 'common/spi_commands.c')
-rw-r--r--common/spi_commands.c65
1 files changed, 65 insertions, 0 deletions
diff --git a/common/spi_commands.c b/common/spi_commands.c
new file mode 100644
index 0000000000..7935bab216
--- /dev/null
+++ b/common/spi_commands.c
@@ -0,0 +1,65 @@
+/*
+ * Copyright 2015 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ *
+ * SPI transfer command for debugging SPI devices.
+ */
+
+#include "common.h"
+#include "console.h"
+#include "spi.h"
+#include "util.h"
+
+static int command_spixfer(int argc, char **argv)
+{
+ int dev_id;
+ uint8_t offset;
+ int v = 0;
+ uint8_t data[32];
+ char *e;
+ int rv = 0;
+
+ if (argc != 5)
+ return EC_ERROR_PARAM_COUNT;
+
+ dev_id = strtoi(argv[2], &e, 0);
+ if (*e)
+ return EC_ERROR_PARAM2;
+
+ offset = strtoi(argv[3], &e, 0);
+ if (*e)
+ return EC_ERROR_PARAM3;
+
+ v = strtoi(argv[4], &e, 0);
+ if (*e)
+ return EC_ERROR_PARAM4;
+
+ if (strcasecmp(argv[1], "rlen") == 0) {
+ uint8_t cmd = 0x80 | offset;
+
+ /* Arbitrary length read; param4 = len */
+ if (v < 0 || v > sizeof(data))
+ return EC_ERROR_PARAM4;
+
+ rv = spi_transaction(&spi_devices[dev_id], &cmd, 1, data, v);
+
+ if (!rv)
+ ccprintf("Data: %.*h\n", v, data);
+
+ } else if (strcasecmp(argv[1], "w") == 0) {
+ /* 8-bit write */
+ uint8_t cmd[2] = { offset, v };
+
+ rv = spi_transaction(&spi_devices[dev_id], cmd, 2, NULL, 0);
+ } else {
+ return EC_ERROR_PARAM1;
+ }
+
+ return rv;
+}
+DECLARE_CONSOLE_COMMAND(spixfer, command_spixfer,
+ "rlen/w id offset [value | len]",
+ "Read write spi. id is spi_devices array index",
+ NULL);
+