diff options
| author | Scott <scollyer@chromium.org> | 2016-09-30 09:37:24 -0700 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2016-10-04 05:55:50 -0700 |
| commit | 9cd10a5a47544af10b0a4620130eaedd9c66eb42 (patch) | |
| tree | f2247d46b4a331211833c06a8136faf7c74c8e24 /chip | |
| parent | e3a34da55b6bc02ea32aae63fef795d9f9bcf5ce (diff) | |
| download | chrome-ec-9cd10a5a47544af10b0a4620130eaedd9c66eb42.tar.gz | |
Cr50: Removed Reef EVT workarounds
- changed the pad assignment for plt_rst_l from DIOA13 to DIOM3;
- removed the board property used to keep uart rx disabled, Uart0 is
now enabled by default on Cr50.
- removed resetting fallback counter on USB updates for reef boards,
they are going to use the same mechanism as kevin and gru.
BRANCH=none
BUG=chrome-os-partner:56540
TEST=Tested on Reef Board ID 1 and Gru Board ID 1. Verfied that
plt_rst_l signal is being detected and that there are no
interrupt storms related to not having a pullup resistor on the
uart rx line. Verified that both platforms successfully boot into
chrome OS using cr50 TPM.
Change-Id: I300a0c75e60acbecf93500b46aced303955a192a
Signed-off-by: Scott <scollyer@chromium.org>
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/391140
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
Diffstat (limited to 'chip')
| -rw-r--r-- | chip/g/uartn.c | 13 | ||||
| -rw-r--r-- | chip/g/usb.c | 6 |
2 files changed, 2 insertions, 17 deletions
diff --git a/chip/g/uartn.c b/chip/g/uartn.c index a2d29e8053..c6c80ced51 100644 --- a/chip/g/uartn.c +++ b/chip/g/uartn.c @@ -112,19 +112,10 @@ void uartn_enable_interrupt(int uart) } -/* Enable TX and RX. Disable HW flow control and loopback */ void uartn_enable(int uart) { - /* Enable UART TX */ - GR_UART_CTRL(uart) = 0x01; - -/* TODO(crosbug.com/p/56540): Remove this when UART0_RX works everywhere */ -#if defined(BOARD_CR50) && !defined(SECTION_IS_RO) - if (!uart && (system_get_board_properties() & BOARD_DISABLE_UART0_RX)) - return; -#endif - - GR_UART_CTRL(uart) |= 0x02; + /* Enable TX and RX. Disable HW flow control and loopback. */ + GR_UART_CTRL(uart) = 0x03; } /* Disable TX, RX, HW flow control, and loopback */ diff --git a/chip/g/usb.c b/chip/g/usb.c index 932081f363..a0a0c5b98d 100644 --- a/chip/g/usb.c +++ b/chip/g/usb.c @@ -732,12 +732,6 @@ static int handle_setup_with_no_data_stage(enum table_case tc, CPRINTS("SETAD 0x%02x (%d)", set_addr, set_addr); print_later("SETAD 0x%02x (%d)", set_addr, set_addr, 0, 0, 0); device_state = DS_ADDRESS; -#ifdef BOARD_CR50 - /* TODO(crosbug.com/p/56540): Remove when no longer needed */ - if (!processed_update_counter && system_get_board_properties() & - BOARD_MARK_UPDATE_ON_USB_REQ) - system_process_retry_counter(); -#endif processed_update_counter = 1; break; |