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authorAbe Levkoy <alevkoy@chromium.org>2019-10-25 16:09:58 -0600
committerCommit Bot <commit-bot@chromium.org>2019-10-30 20:13:01 +0000
commit8741abc79b0fd4d94873d96f28e423401dae75b3 (patch)
treef7ab12c0e36b3c65b87a65d8c277ec8e5c23537a /chip
parent9e2fc248a49d7c4ee7f6bf030586a5adf584052f (diff)
downloadchrome-ec-8741abc79b0fd4d94873d96f28e423401dae75b3.tar.gz
PCH_PLTRST_L: Use appropriate config option
Define a GPIO for PCH_PLTRST_L based on CONFIG_HOSTCMD_ESPI, because that is the configuration option used to enable to use of the the GPIO signal name thus defined. Remove the now unused CONFIG_HOSTCMD_PLTRST_IS_VWIRE option. BUG=b:139553375,b:143288478 TEST=Build it83xx_evb, reef_it8320, and tglrvpu_ite BRANCH=none Change-Id: Ia0dbfee0c6c2eda566e79cad7ab6e0c685809c05 Signed-off-by: Abe Levkoy <alevkoy@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1881756 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Keith Short <keithshort@chromium.org>
Diffstat (limited to 'chip')
-rw-r--r--chip/mchp/espi.c2
-rw-r--r--chip/mchp/lpc.c2
2 files changed, 2 insertions, 2 deletions
diff --git a/chip/mchp/espi.c b/chip/mchp/espi.c
index 95cd05c10a..1cc06d8f90 100644
--- a/chip/mchp/espi.c
+++ b/chip/mchp/espi.c
@@ -1429,7 +1429,7 @@ void espi_init(void)
<< MCHP_ESPI_CAP1_IO_BITPOS);
#endif
-#ifdef CONFIG_HOSTCMD_ESPI_PLTRST_IS_VWIRE
+#ifdef CONFIG_HOSTCMD_ESPI
MCHP_ESPI_IO_PLTRST_SRC = MCHP_ESPI_PLTRST_SRC_VW;
#else
MCHP_ESPI_IO_PLTRST_SRC = MCHP_ESPI_PLTRST_SRC_PIN;
diff --git a/chip/mchp/lpc.c b/chip/mchp/lpc.c
index 2b273e11c5..91adb7f17c 100644
--- a/chip/mchp/lpc.c
+++ b/chip/mchp/lpc.c
@@ -901,7 +901,7 @@ int lpc_get_pltrst_asserted(void)
#ifdef CONFIG_HOSTCMD_ESPI
/*
* eSPI PLTRST# a VWire or side-band signal
- * Controlled by CONFIG_HOSTCMD_ESPI_PLTRST_IS_VWIRE
+ * Controlled by CONFIG_HOSTCMD_ESPI
*/
return !espi_vw_get_wire(VW_PLTRST_L);
#else