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authorAllen Webb <allenwebb@google.com>2018-08-21 07:44:37 -0700
committerchrome-bot <chrome-bot@chromium.org>2018-09-07 18:36:34 -0700
commit8961872603f6d7b66ef97d444711e83d6a55e2f4 (patch)
tree814d6cf13e2fc23162daf6437dcef7625d7c84bf /chip
parent5c5555a49d89154f14efa0c68c99938ef1313b73 (diff)
downloadchrome-ec-8961872603f6d7b66ef97d444711e83d6a55e2f4.tar.gz
common: flash and nvmem fixes for compatibility with the host board.
This CL 1) Forces alignment of __host_flash so it can be used with nvcounter 2) Disables a compile time check for the host board that failes because the host board uses a variable to emulate flash memory. 3) Disables nvmem_vars console commands that are specific to a unit test for fuzzing targets. BRANCH=none BUG=chromium:876582 TEST=make -j buildfuzztests (with cr50_fuzz CL) Change-Id: Id6257132d8f2dd73ae07e796efd0da3df83b30d6 Signed-off-by: Allen Webb <allenwebb@google.com> Reviewed-on: https://chromium-review.googlesource.com/1183533 Reviewed-by: Randall Spangler <rspangler@chromium.org>
Diffstat (limited to 'chip')
-rw-r--r--chip/host/flash.c4
1 files changed, 3 insertions, 1 deletions
diff --git a/chip/host/flash.c b/chip/host/flash.c
index b83d72ff5f..4961db1578 100644
--- a/chip/host/flash.c
+++ b/chip/host/flash.c
@@ -8,11 +8,13 @@
#include <stdio.h>
#include "common.h"
+#include "config_chip.h"
#include "flash.h"
#include "persistence.h"
#include "util.h"
-char __host_flash[CONFIG_FLASH_SIZE];
+/* This needs to be aligned to the erase bank size for NVCTR. */
+__aligned(CONFIG_FLASH_ERASE_SIZE) char __host_flash[CONFIG_FLASH_SIZE];
uint8_t __host_flash_protect[PHYSICAL_BANKS];
/* Override this function to make flash erase/write operation fail */