diff options
| author | Namyoon Woo <namyoon@chromium.org> | 2018-07-13 16:52:22 -0700 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2018-08-07 01:50:58 -0700 |
| commit | fe7ef880f84fc9fe204208cb49a566075be5425d (patch) | |
| tree | 53a6ebef13001820ef6182e24a291ba463f874fc /chip | |
| parent | 7c47fcc96889866ee143e01b56f78b3732657a7f (diff) | |
| download | chrome-ec-fe7ef880f84fc9fe204208cb49a566075be5425d.tar.gz | |
cr50: delay EC boot when Rdd detects SuzyQ at boot time.
EC_RST_L deassertion shall be delayed two seconds if two
conditions below are satisfied.
1. Power button is pressed.
2. RDD detectes a debug cable.
This is to gain some time to issue a command to prevent a broken
EC from booting.
BUG=b:37351386
BRANCH=cr50
TEST=manually on dut with DELAY_EC_BOOT_USEC defined as 30 sec.
(1) hard-reset
Binary Download + Hold power button => no delay.
(2) Wake from hibernation
- (ec) hibernate
- unplug all cables
- Hold power button + plug SuzyQ cable => no delay.
(3) Power-on Reset
- (ec) cutoff
- unplug all cables
- Hold power button + plug SuzyQ cable => delay!
(4) Power-on Reset, no delay
- (ec) cutoff
- unplug all cables
- plug SuzyQ cable => no delay.
Change-Id: I29a1a97c053cdb898ac6ac8dc2409d5d164552d9
Signed-off-by: Namyoon Woo <namyoon@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1137434
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-by: Mary Ruthven <mruthven@chromium.org>
Diffstat (limited to 'chip')
| -rw-r--r-- | chip/g/rbox.c | 17 | ||||
| -rw-r--r-- | chip/g/rdd.c | 2 | ||||
| -rw-r--r-- | chip/g/rdd.h | 7 |
3 files changed, 22 insertions, 4 deletions
diff --git a/chip/g/rbox.c b/chip/g/rbox.c index c30e80a871..a202c9a1c6 100644 --- a/chip/g/rbox.c +++ b/chip/g/rbox.c @@ -5,10 +5,13 @@ #include "clock.h" #include "hooks.h" +#include "rdd.h" #include "registers.h" +#include "system.h" #include "timer.h" -#define POWER_BUTTON 2 +#define DELAY_EC_BOOT_USEC (2 * SECOND) +DECLARE_DEFERRED(deassert_ec_rst); int rbox_powerbtn_is_pressed(void) { @@ -20,12 +23,20 @@ static void rbox_release_ec_reset(void) /* Unfreeze the PINMUX */ GREG32(PINMUX, HOLD) = 0; + /* After a POR, if it finds RDD cable plugged and Power button pressed, + * then it delays booting EC by DELAY_EC_BOOT_USEC. + */ + if ((system_get_reset_flags() & RESET_FLAG_POWER_ON) && + rdd_is_detected() && rbox_powerbtn_is_pressed()) { + hook_call_deferred(&deassert_ec_rst_data, DELAY_EC_BOOT_USEC); + return; + } + /* Allow some time for outputs to stabilize. */ usleep(500); /* Let the EC go (the RO bootloader asserts it ASAP after POR) */ - GREG32(RBOX, ASSERT_EC_RST) = 0; - + deassert_ec_rst(); } DECLARE_HOOK(HOOK_INIT, rbox_release_ec_reset, HOOK_PRIO_LAST); diff --git a/chip/g/rdd.c b/chip/g/rdd.c index 57c4bd96b9..9febad81c6 100644 --- a/chip/g/rdd.c +++ b/chip/g/rdd.c @@ -41,7 +41,7 @@ static int force_detected; * * @return 1 if debug accessory is detected, 0 if not detected */ -static int rdd_is_detected(void) +int rdd_is_detected(void) { uint8_t cc1 = GREAD_FIELD(RDD, INPUT_PIN_VALUES, CC1); uint8_t cc2 = GREAD_FIELD(RDD, INPUT_PIN_VALUES, CC2); diff --git a/chip/g/rdd.h b/chip/g/rdd.h index 1fd4f89152..159801b203 100644 --- a/chip/g/rdd.h +++ b/chip/g/rdd.h @@ -16,4 +16,11 @@ void init_rdd_state(void); */ void print_rdd_state(void); +/** + * Get instantaneous cable detect state + * + * @return 1 if debug accessory is detected, 0 if not detected. + */ +int rdd_is_detected(void); + #endif /* __CROS_RDD_H */ |