diff options
author | Diana Z <dzigterman@chromium.org> | 2018-11-02 11:49:43 -0600 |
---|---|---|
committer | Jonathan Brandmeyer <jbrandmeyer@chromium.org> | 2018-11-06 02:06:25 +0000 |
commit | 6a630121f2789c913a917196c4d399533db91382 (patch) | |
tree | 85734a6a0573d60de23758c1a935e6a163d0942c /chip | |
parent | c0caf458ead3dbae2bec7b67db4731dfe2861824 (diff) | |
download | chrome-ec-6a630121f2789c913a917196c4d399533db91382.tar.gz |
NPCX: Fix for alternate GPIOs on the NPCX7
During a recent naming change to the alternate GPIO tables, a few of the
pins for the NPCX7 were missed. This change adds those pins back in.
BRANCH=None
BUG=b:118856402,b:118833549
TEST=builds, verified bobba USB 2.0 on DB type-c port works now
Change-Id: Id3f3fa086b24da37eeeb49c5f4b24ffd4a5cfd6f
Signed-off-by: Diana Z <dzigterman@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1315628
Commit-Ready: Ryan Zhang <ryan.zhang@quanta.corp-partner.google.com>
Reviewed-by: Justin TerAvest <teravest@chromium.org>
(cherry picked from commit efa0cb94e8cb111bb296523402bfa689e97dc92e)
Reviewed-on: https://chromium-review.googlesource.com/c/1318950
Commit-Queue: Devin Lu <Devin.Lu@quantatw.com>
Tested-by: Devin Lu <Devin.Lu@quantatw.com>
Reviewed-by: Jonathan Brandmeyer <jbrandmeyer@chromium.org>
Diffstat (limited to 'chip')
-rw-r--r-- | chip/npcx/gpio_chip-npcx7.h | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/chip/npcx/gpio_chip-npcx7.h b/chip/npcx/gpio_chip-npcx7.h index c8e28c9ddb..644c1c793d 100644 --- a/chip/npcx/gpio_chip-npcx7.h +++ b/chip/npcx/gpio_chip-npcx7.h @@ -379,9 +379,10 @@ NPCX_ALT_GPIO_7_3 /* TA2_SEL1 */ \ NPCX_ALT_GPIO_7_5 /* CR_SIN2 & 32KHZ_OUT */ \ NPCX_ALT_GPIO_8_0 /* PWM3 */ \ + NPCX_ALT_GPIO_8_2 /* KSO14 */ \ + NPCX_ALT_GPIO_8_3 /* KSO15 */ \ NPCX_ALT_GPIO_8_5 /* SMB4SCL0 */ \ - NPCX_ALT_GPIO_8_6 /* CR_SOUT2 */ \ - NPCX_ALT_GPIO_8_6 /* SMB4SDA0 */ \ + NPCX_ALT_GPIO_8_6 /* CR_SOUT2 & SMB4SDA0 */ \ NPCX_ALT_GPIO_8_7 /* SMB1SDA0 */ \ NPCX_ALT_GPIO_9_0 /* SMB1SCL0 */ \ NPCX_ALT_GPIO_9_1 /* SMB2SDA0 */ \ @@ -396,6 +397,7 @@ NPCX_ALT_GPIO_A_6 /* TA2_SEL2 */ \ NPCX_ALT_GPIO_A_7 /* I2S_SCLK */ \ NPCX_ALT_GPIO_B_0 /* I2S_DATA */ \ + NPCX_ALT_GPIO_B_1 /* KSO17 */ \ NPCX_ALT_GPIO_B_2 /* SMB7SDA0 */ \ NPCX_ALT_GPIO_B_3 /* SMB7SCL0 */ \ NPCX_ALT_GPIO_B_4 /* SMB0SDA0 */ \ |