diff options
| author | Naresh G Solanki <naresh.solanki@intel.com> | 2018-07-17 17:04:20 +0530 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2018-08-07 18:09:01 -0700 |
| commit | 5d2cdcab232748095d1efeb4e5c0fc23b13adb67 (patch) | |
| tree | df38d08eba1c91a3ccb8b34a64086347a634ee54 /chip | |
| parent | 3ef0c3567bc72ee347225a61f2e5e645afd71591 (diff) | |
| download | chrome-ec-5d2cdcab232748095d1efeb4e5c0fc23b13adb67.tar.gz | |
it83xx: Restore reset flag from BRAM during startup
During recovery mode switch using wait-ext & ap-off followed by cold
reset assertion, reset flag from BRAM was ignored & hence EC continued
power on sequence instead of keeping AP in off state. This caused
failure in recovery mode switch in FAFT.
Also there is no mechanism to verify VBAT power loss.
Now that content of BRAM is validated using magic value during startup,
restore reset flag from BRAM.
BUG=b:80703195
BRANCH=master
TEST= Build coreboot image for BIP & run firmware_FAFTSetup test & make
sure test passes i.e., DUT successfully switches to recovery mode & boots
from USB storage(pendrive).
Change-Id: I01a7c9ed2c0e32435a064d9de99c06d6fa505e0b
Signed-off-by: Naresh G Solanki <naresh.solanki@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/1140174
Commit-Ready: Naresh Solanki <naresh.solanki@intel.com>
Tested-by: Naresh Solanki <naresh.solanki@intel.com>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Diffstat (limited to 'chip')
| -rw-r--r-- | chip/it83xx/system.c | 21 |
1 files changed, 10 insertions, 11 deletions
diff --git a/chip/it83xx/system.c b/chip/it83xx/system.c index 87a97e1021..02153424e1 100644 --- a/chip/it83xx/system.c +++ b/chip/it83xx/system.c @@ -44,6 +44,12 @@ static void check_reset_cause(void) uint8_t raw_reset_cause = IT83XX_GCTRL_RSTS & 0x03; uint8_t raw_reset_cause2 = IT83XX_GCTRL_SPCTRL4 & 0x07; + /* Restore saved reset flags. */ + flags |= BRAM_RESET_FLAGS0 << 24; + flags |= BRAM_RESET_FLAGS1 << 16; + flags |= BRAM_RESET_FLAGS2 << 8; + flags |= BRAM_RESET_FLAGS3; + /* Clear reset cause. */ IT83XX_GCTRL_RSTS |= 0x03; IT83XX_GCTRL_SPCTRL4 |= 0x07; @@ -61,18 +67,11 @@ static void check_reset_cause(void) if (raw_reset_cause2 & 0x04) flags |= RESET_FLAG_RESET_PIN; - /* Restore then clear saved reset flags. */ - if (!(flags & RESET_FLAG_POWER_ON)) { - flags |= BRAM_RESET_FLAGS0 << 24; - flags |= BRAM_RESET_FLAGS1 << 16; - flags |= BRAM_RESET_FLAGS2 << 8; - flags |= BRAM_RESET_FLAGS3; - - /* watchdog module triggers these reset */ - if (flags & (RESET_FLAG_HARD | RESET_FLAG_SOFT)) - flags &= ~RESET_FLAG_WATCHDOG; - } + /* watchdog module triggers these reset */ + if (flags & (RESET_FLAG_HARD | RESET_FLAG_SOFT)) + flags &= ~RESET_FLAG_WATCHDOG; + /* Clear saved reset flags. */ BRAM_RESET_FLAGS0 = 0; BRAM_RESET_FLAGS1 = 0; BRAM_RESET_FLAGS2 = 0; |