diff options
| author | Daisuke Nojiri <dnojiri@chromium.org> | 2016-04-20 16:51:08 -0700 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2016-04-25 16:49:02 -0700 |
| commit | dd5bea954bd67770a80ef66ed16602da23412adc (patch) | |
| tree | 5b87c6736ad3bdaff0fcd8b253de8d13d2b4a7b3 /chip/stm32/uart.c | |
| parent | 40c02e3ff2477df1aca7657a92905816e5a13d0c (diff) | |
| download | chrome-ec-dd5bea954bd67770a80ef66ed16602da23412adc.tar.gz | |
STM32: Support LPUART console
This patch adds support for console on LPUART (low power UART).
It is wired to the USB type B port on the board, which is also one of the
power sources. So, using LPUART simplifies the set up.
BUG=none
BRANCH=tot
TEST=Verified console works on stm32l476g-eval. make buildall
Change-Id: Iccf697cfabdcb7e1362d8453708eb79610d2e0cb
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/340101
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Diffstat (limited to 'chip/stm32/uart.c')
| -rw-r--r-- | chip/stm32/uart.c | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/chip/stm32/uart.c b/chip/stm32/uart.c index 69dc7d26d2..2804b3153a 100644 --- a/chip/stm32/uart.c +++ b/chip/stm32/uart.c @@ -236,7 +236,12 @@ static void uart_freq_change(void) /* UART clocked from the main clock */ freq = clock_get_freq(); #endif + +#if (UARTN == 9) /* LPUART */ + div = DIV_ROUND_NEAREST(freq, CONFIG_UART_BAUD_RATE) * 256; +#else div = DIV_ROUND_NEAREST(freq, CONFIG_UART_BAUD_RATE); +#endif #if defined(CHIP_FAMILY_STM32L) || defined(CHIP_FAMILY_STM32F0) || \ defined(CHIP_FAMILY_STM32F3) || defined(CHIP_FAMILY_STM32L4) @@ -274,11 +279,14 @@ void uart_init(void) #endif /* UARTN */ #elif defined(CHIP_FAMILY_STM32L4) STM32_RCC_CCIPR |= (0x2 << STM32_RCC_CCIPR_USART1SEL_SHIFT); + STM32_RCC_CCIPR |= (0x2 << STM32_RCC_CCIPR_LPUART1SEL_SHIFT); #endif /* CHIP_FAMILY_STM32F0 || CHIP_FAMILY_STM32F3 */ /* Enable USART clock */ #if (UARTN == 1) STM32_RCC_APB2ENR |= STM32_RCC_PB2_USART1; +#elif (UARTN == 9) + STM32_RCC_APB1ENR2 |= STM32_RCC_APB1ENR2_LPUART1EN; #else STM32_RCC_APB1ENR |= CONCAT2(STM32_RCC_PB1_USART, UARTN); #endif |