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authorVic Yang <victoryang@google.com>2015-02-04 11:28:53 -0800
committerChromeOS Commit Bot <chromeos-commit-bot@chromium.org>2015-02-10 10:47:07 +0000
commit049463f8ad985f9cb996caa7dbc5438383bd3084 (patch)
tree93ff78695657a998919c6d6e28101cd158489368 /chip/stm32/gpio-stm32l.c
parenta9ae00b10129feca28713a7b88978ff6cfe7c2a6 (diff)
downloadchrome-ec-049463f8ad985f9cb996caa7dbc5438383bd3084.tar.gz
stm32: Add delay after enabling peripheral clock
We need a dummy read after enabling AHB peripheral clock before we can access the peripheral. For APB, we also need a dummy read for STM32F3. BRANCH=All affected BUG=chrome-os-partner:33007 TEST=make buildall Change-Id: I47f4a024dca294f555428c3f2053c1d32835ebe0 Signed-off-by: Vic Yang <victoryang@google.com> Reviewed-on: https://chromium-review.googlesource.com/246181 Reviewed-by: Alec Berg <alecaberg@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org> Tested-by: Vic Yang <victoryang@chromium.org> Commit-Queue: Vic Yang <victoryang@chromium.org>
Diffstat (limited to 'chip/stm32/gpio-stm32l.c')
-rw-r--r--chip/stm32/gpio-stm32l.c4
1 files changed, 4 insertions, 0 deletions
diff --git a/chip/stm32/gpio-stm32l.c b/chip/stm32/gpio-stm32l.c
index 44282fc5c0..c015112503 100644
--- a/chip/stm32/gpio-stm32l.c
+++ b/chip/stm32/gpio-stm32l.c
@@ -5,6 +5,7 @@
/* GPIO module for Chrome EC */
+#include "clock.h"
#include "common.h"
#include "gpio.h"
#include "hooks.h"
@@ -26,6 +27,9 @@ void gpio_enable_clocks(void)
* and support disabling some of them in low-power idle.
*/
STM32_RCC_AHBENR |= 0x3f;
+
+ /* Delay 1 AHB clock cycle after the clock is enabled */
+ clock_wait_bus_cycles(BUS_AHB, 1);
}
static void gpio_init(void)