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authorVic Yang <victoryang@chromium.org>2013-08-29 16:42:02 +0800
committerchrome-internal-fetch <chrome-internal-fetch@google.com>2013-09-05 03:10:09 +0000
commitb57a5fe0edfcd8fa264c2f83755f5c6ae73d8435 (patch)
tree23d2690e7261d82277ae179a56a60070c3591f0b /chip/stm32/clock-stm32l.c
parentc34d0cc8bf4308046d2d213f4ff744b011e0edbe (diff)
downloadchrome-ec-b57a5fe0edfcd8fa264c2f83755f5c6ae73d8435.tar.gz
STM32L ADC driver
ADC module on STM32L is clocked by HSI oscillator, and thus we need to switch to HSI if using MSI. After the conversion, if the system is not in S0, clock is switched back to MSI again. There are several register bits that can only be written when ADC is powered down. For now, let's just power down the ADC after each conversion. Currently ADC watchdog is not working and is disabled on STM32L. BUG=chrome-os-partner:22242 TEST=Try multiple all-channel and single-channel reads in S0 and S5. BRANCH=None Change-Id: I769dda8a9c69ac9de1eb22d6d259034eef8c1ac4 Signed-off-by: Vic Yang <victoryang@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/167454
Diffstat (limited to 'chip/stm32/clock-stm32l.c')
-rw-r--r--chip/stm32/clock-stm32l.c23
1 files changed, 20 insertions, 3 deletions
diff --git a/chip/stm32/clock-stm32l.c b/chip/stm32/clock-stm32l.c
index e89c2e3ef5..09b8f00704 100644
--- a/chip/stm32/clock-stm32l.c
+++ b/chip/stm32/clock-stm32l.c
@@ -5,6 +5,7 @@
/* Clocks and power management settings */
+#include "chipset.h"
#include "clock.h"
#include "common.h"
#include "console.h"
@@ -146,6 +147,22 @@ static void clock_set_osc(enum clock_osc osc)
}
}
+void clock_enable_module(enum module_id module, int enable)
+{
+ static uint32_t clock_mask;
+ int new_mask;
+
+ if (enable)
+ new_mask = clock_mask | (1 << module);
+ else
+ new_mask = clock_mask & ~(1 << module);
+
+ /* Only change clock if needed */
+ if ((!!new_mask) != (!!clock_mask))
+ clock_set_osc(new_mask ? OSC_HSI : OSC_MSI);
+ clock_mask = new_mask;
+}
+
void clock_init(void)
{
/*
@@ -161,15 +178,15 @@ void clock_init(void)
static void clock_chipset_startup(void)
{
/* Return to full speed */
- clock_set_osc(OSC_HSI);
+ clock_enable_module(MODULE_CHIPSET, 1);
}
DECLARE_HOOK(HOOK_CHIPSET_STARTUP, clock_chipset_startup, HOOK_PRIO_DEFAULT);
DECLARE_HOOK(HOOK_CHIPSET_RESUME, clock_chipset_startup, HOOK_PRIO_DEFAULT);
static void clock_chipset_shutdown(void)
{
- /* Drop to lower clock speed */
- clock_set_osc(OSC_MSI);
+ /* Drop to lower clock speed if no other module requires full speed */
+ clock_enable_module(MODULE_CHIPSET, 0);
}
DECLARE_HOOK(HOOK_CHIPSET_SHUTDOWN, clock_chipset_shutdown, HOOK_PRIO_DEFAULT);
DECLARE_HOOK(HOOK_CHIPSET_SUSPEND, clock_chipset_shutdown, HOOK_PRIO_DEFAULT);