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| author | Randall Spangler <rspangler@chromium.org> | 2013-10-22 13:39:29 -0700 |
|---|---|---|
| committer | Randall Spangler <rspangler@chromium.org> | 2013-10-22 22:23:53 +0000 |
| commit | 9ccd9668a21d335fd81665c65aa56d3d5e91775e (patch) | |
| tree | 8586ccbe968c75e22ee11ed239516d43b2857f1a /chip/stm32/clock-stm32f.c | |
| parent | 7f3ca9fb659c85e046bfef8a794fc03111fd63c5 (diff) | |
| download | chrome-ec-9ccd9668a21d335fd81665c65aa56d3d5e91775e.tar.gz | |
cleanup: update comments with existing bug numbers
Some of the comments no longer apply. Others needed more info.
No code changes; just comment changes.
BUG=none
BRANCH=none
TEST=build all platforms
Change-Id: I1d52aa9a98427a78c9d9a8cf44934fb04c3c00c8
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/174084
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
Diffstat (limited to 'chip/stm32/clock-stm32f.c')
| -rw-r--r-- | chip/stm32/clock-stm32f.c | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/chip/stm32/clock-stm32f.c b/chip/stm32/clock-stm32f.c index 11b426a42f..96218f115f 100644 --- a/chip/stm32/clock-stm32f.c +++ b/chip/stm32/clock-stm32f.c @@ -30,7 +30,10 @@ /* * RTC clock frequency (connected to LSI clock) * - * TODO: crosbug.com/p/12281 calibrate LSI frequency + * TODO(crosbug.com/p/12281): Calibrate LSI frequency on a per-chip basis. The + * LSI on any given chip can be between 30 kHz to 60 kHz. Without calibration, + * LSI frequency may be off by as much as 50%. Fortunately, we don't do any + * high-precision delays based solely on LSI. */ #define RTC_FREQ 40000 /* Hz */ #define US_PER_RTC_TICK (1000000 / RTC_FREQ) |