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authorMulin Chao <mlchao@nuvoton.com>2017-04-18 11:10:41 +0800
committerchrome-bot <chrome-bot@chromium.org>2017-04-25 01:45:37 -0700
commit9cd1dcc3fd581100d28444c087f3df0ca8a8e0d6 (patch)
treeb4d369d84e8df9259ad1eac10fe24301f1f00dee /chip/npcx/build.mk
parent5eaf807dcdbc023d2d2cf12d6d150ca7b7b2fb9f (diff)
downloadchrome-ec-9cd1dcc3fd581100d28444c087f3df0ca8a8e0d6.tar.gz
npcx: Introduce npcx7 series ec chip definitions and configurations.
This CL includes: 1. Add CHIP_FAMILY_NPCX5/7 and CHIP_VARIANT_NPCX7M6F to distinguish which npcx's ec is used on the board. 2. Add config_chip-npcx5/7.h files and move features depend on chip family into them. 3. Add NPCX_INT_FLASH_SUPPORT, NPCX_PSL_MODE_SUPPORT and NPCX_EXT32K_OSC_SUPPORT to determine which features are supported on npcx7 ec. We'll use them later in gpio/system/flash drivers. 4. Add ram size checking for all npcx ec series. BRANCH=none BUG=none TEST=No build errors for all boards using npcx5 series (besides gru). Build poppy board and upload FW to platform. No issues found. Change-Id: Ia932996d01da71fea73ddd545255bdd59e581bcf Signed-off-by: Mulin Chao <mlchao@nuvoton.com> Reviewed-on: https://chromium-review.googlesource.com/481560 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org>
Diffstat (limited to 'chip/npcx/build.mk')
-rw-r--r--chip/npcx/build.mk5
1 files changed, 5 insertions, 0 deletions
diff --git a/chip/npcx/build.mk b/chip/npcx/build.mk
index 2814366ffb..d5047237e9 100644
--- a/chip/npcx/build.mk
+++ b/chip/npcx/build.mk
@@ -11,6 +11,11 @@ CORE:=cortex-m
# Allow the full Cortex-M4 instruction set
CFLAGS_CPU+=-march=armv7e-m -mcpu=cortex-m4
+# Assign default CHIP_FAMILY as npcx5 for old boards used npcx5 series
+ifeq ($(CHIP_FAMILY),)
+CHIP_FAMILY:=npcx5
+endif
+
# Required chip modules
chip-y=header.o clock.o gpio.o hwtimer.o jtag.o system.o uart.o