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author | Kevin K Wong <kevin.k.wong@intel.com> | 2015-04-20 17:48:21 -0700 |
---|---|---|
committer | ChromeOS Commit Bot <chromeos-commit-bot@chromium.org> | 2015-04-27 23:29:30 +0000 |
commit | 5a18413ff528331a229fe8734c6bca932e5478e1 (patch) | |
tree | ed2469096bf0612fc16fde5e8b4a13fb24b1db80 /chip/mec1322/registers.h | |
parent | b35e4d47fc55a8ad1e1aa3f9818576176510008d (diff) | |
download | chrome-ec-5a18413ff528331a229fe8734c6bca932e5478e1.tar.gz |
mec1322: Added task-based Port80 POST code support.
With mec1322's EMI set to decode IO 0x800, it does not have any other
interfaces to support POST code via IO 0x80.
This change is to enable Port80 POST code support via polling method.
Limitation:
- POST Code 0xFF will be ignored.
- POST Code frequency is greater than 1 msec.
BUG=chrome-os-partner:39386
TEST=Verified Port80 POST code is captured in EC console.
Verified "port80 task" console command will disable/enable Port80 task.
Verified "port80 poll" will get the last Port80 POST code.
BRANCH=none
Change-Id: I27e53e84b5be1fd98464a44407dd58b93d8c798d
Signed-off-by: Kevin K Wong <kevin.k.wong@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/266783
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Diffstat (limited to 'chip/mec1322/registers.h')
-rw-r--r-- | chip/mec1322/registers.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/chip/mec1322/registers.h b/chip/mec1322/registers.h index af89609dc9..88b055eaa5 100644 --- a/chip/mec1322/registers.h +++ b/chip/mec1322/registers.h @@ -175,6 +175,10 @@ static inline uintptr_t gpio_port_base(int port_id) /* Mailbox */ +#define MEC1322_MBX_RT_BASE 0x400f2400 +#define MEC1322_MBX_INDEX REG8(MEC1322_MBX_RT_BASE + 0x0) +#define MEC1322_MBX_DATA REG8(MEC1322_MBX_RT_BASE + 0x1) + #define MEC1322_MBX_BASE 0x400f2500 #define MEC1322_MBX_H2E_MBX REG8(MEC1322_MBX_BASE + 0x0) #define MEC1322_MBX_E2H_MBX REG8(MEC1322_MBX_BASE + 0x4) |