diff options
| author | Shawn Nematbakhsh <shawnn@chromium.org> | 2015-09-07 14:12:57 -0700 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2015-09-16 14:49:33 -0700 |
| commit | fe77303bec6c78786a9df1dbdb33af64787e20c8 (patch) | |
| tree | 772d2fbb53178121ddca0dfbafbd304ee075ce1b /chip/it83xx | |
| parent | 1167cad6a88e45bbf6a5599f19d018cd6a8b5233 (diff) | |
| download | chrome-ec-fe77303bec6c78786a9df1dbdb33af64787e20c8.tar.gz | |
cleanup: Remove redundant FLASH_SIZE CONFIGs
Since there is no more concept of a flash region belonging only to the
EC, we only need one FLASH_SIZE config, which represents the actual
physical size of flash.
BRANCH=None
BUG=chrome-os-partner:23796
TEST=With entire patch series, on both Samus and Glados:
- Verify 'version' EC console command is correct
- Verify 'flashrom -p ec -r read.bin' reads back EC image
- Verify software sync correctly flashes both EC and PD RW images
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Change-Id: I18a34a943e02c8a029f330f213a8634a2ca418b6
Reviewed-on: https://chromium-review.googlesource.com/297824
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Mulin Chao <mlchao@nuvoton.com>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Diffstat (limited to 'chip/it83xx')
| -rw-r--r-- | chip/it83xx/config_chip.h | 2 | ||||
| -rw-r--r-- | chip/it83xx/flash.c | 8 |
2 files changed, 5 insertions, 5 deletions
diff --git a/chip/it83xx/config_chip.h b/chip/it83xx/config_chip.h index 5115e62c24..1d88e7df4f 100644 --- a/chip/it83xx/config_chip.h +++ b/chip/it83xx/config_chip.h @@ -59,7 +59,7 @@ * in order to emulate per-bank write-protection UNTIL REBOOT. The hardware * doesn't support a write-protect pin, and if we make the write-protection * permanent, it can't be undone easily enough to support RMA. */ -#define CONFIG_FLASH_PHYSICAL_SIZE 0x00040000 +#define CONFIG_FLASH_SIZE 0x00040000 /****************************************************************************/ /* Define our flash layout. */ diff --git a/chip/it83xx/flash.c b/chip/it83xx/flash.c index 5155e94332..54e2bc650f 100644 --- a/chip/it83xx/flash.c +++ b/chip/it83xx/flash.c @@ -283,7 +283,7 @@ static enum flash_wp_status flash_check_wp(void) enum flash_wp_status wp_status; int all_bank_count, bank; - all_bank_count = CONFIG_FLASH_PHYSICAL_SIZE / CONFIG_FLASH_BANK_SIZE; + all_bank_count = CONFIG_FLASH_SIZE / CONFIG_FLASH_BANK_SIZE; for (bank = 0; bank < all_bank_count; bank++) { if (!(IT83XX_GCTRL_EWPR0PFEC(FWP_REG(bank)) & FWP_MASK(bank))) @@ -430,7 +430,7 @@ int flash_physical_protect_now(int all) if (all) { /* Protect the entire flash */ flash_protect_banks(0, - CONFIG_FLASH_PHYSICAL_SIZE / CONFIG_FLASH_BANK_SIZE, + CONFIG_FLASH_SIZE / CONFIG_FLASH_BANK_SIZE, FLASH_WP_EC); all_protected = 1; } else { @@ -572,11 +572,11 @@ int flash_pre_init(void) if (prot_flags & EC_FLASH_PROTECT_GPIO_ASSERTED) { /* Protect the entire flash of host interface */ flash_protect_banks(0, - CONFIG_FLASH_PHYSICAL_SIZE / CONFIG_FLASH_BANK_SIZE, + CONFIG_FLASH_SIZE / CONFIG_FLASH_BANK_SIZE, FLASH_WP_HOST); /* Protect the entire flash of DBGR interface */ flash_protect_banks(0, - CONFIG_FLASH_PHYSICAL_SIZE / CONFIG_FLASH_BANK_SIZE, + CONFIG_FLASH_SIZE / CONFIG_FLASH_BANK_SIZE, FLASH_WP_DBGR); /* * Write protect is asserted. If we want RO flash protected, |