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authorNamyoon Woo <namyoon@chromium.org>2020-01-23 18:47:51 -0800
committerCommit Bot <commit-bot@chromium.org>2020-02-19 20:40:15 +0000
commit88025bd9551eb73e21221279df415a39444d076c (patch)
tree67a3424f5fffe5bbd70083ac7378dd9bbbbccf70 /chip/g
parentecef6be26f54aba46569b4a578442565cc2ffcba (diff)
downloadchrome-ec-88025bd9551eb73e21221279df415a39444d076c.tar.gz
control EC USB-UART bridge
This CL separates the control on USB-UART bridge of EC device from EC UART control. USB-UART bridge shall be enabled if CCD connection is detected and the CCD capability is enabled. Otherwise, EC USB-UART shall be disabled. By doing so, CCD capability can be observed even when EC-CR50 communication enables EC UART. This patch increases the flash usage by 204 bytes BUG=b:148247228 BRANCH=cr50, cr50_mp TEST=ran firmware_Cr50CCDServoCap on Helios. > ccd State: Locked Password: none Flags: 0x000001 Capabilities: 0000000000000000 ... > ccdstate AP: on AP UART: on EC: on Rdd: connected Servo: connected CCD EXT: enabled State flags: UARTAP UARTEC I2C USBEC > ccdstate AP: on AP UART: on EC: on Rdd: connected Servo: disconnected CCD EXT: enabled State flags: UARTAP+TX UARTEC USBEC CCD ports blocked: (none) > ccd State: Opened Password: none Flags: 0x800001 Capabilities: 5555454115000000 ... > ccdstate AP: on AP UART: on EC: on Rdd: connected Servo: connected CCD EXT: enabled State flags: UARTAP UARTEC I2C USBEC+TX CCD ports blocked: (none) > ccdstate AP: on AP UART: on EC: on Rdd: connected Servo: undetectable CCD EXT: enabled State flags: UARTAP+TX UARTEC+TX I2C SPI USBEC+TX CCD ports blocked: (none) Change-Id: I6bb560a05831105ff68a9e13e4b28b002ed98096 Signed-off-by: Namyoon Woo <namyoon@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2018061 Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-by: Mary Ruthven <mruthven@chromium.org>
Diffstat (limited to 'chip/g')
-rw-r--r--chip/g/usart.c60
-rw-r--r--chip/g/usart.h9
2 files changed, 62 insertions, 7 deletions
diff --git a/chip/g/usart.c b/chip/g/usart.c
index d7ca39ea14..68ab726814 100644
--- a/chip/g/usart.c
+++ b/chip/g/usart.c
@@ -129,19 +129,57 @@ USB_STREAM_CONFIG(ec_usb,
ec_uart_to_usb)
#endif
+#ifdef BOARD_CR50
+static uint8_t ec_bridge_enabled_;
+static uint8_t ec_bridge_tx_enabled_;
+
+void uart_ec_bridge_enable(int enable, int write)
+{
+ write = enable && write;
+
+ if (write && !ec_bridge_tx_enabled_)
+ task_trigger_irq(GC_IRQNUM_UART2_TXINT);
+
+ ec_bridge_enabled_ = enable;
+ ec_bridge_tx_enabled_ = write;
+}
+
+int uart_ec_bridge_is_enabled(void)
+{
+ return !!ec_bridge_enabled_;
+}
+
+int uart_ec_bridge_tx_is_enabled(void)
+{
+ return !!ec_bridge_tx_enabled_;
+}
+
+#endif /* BOARD_CR50 */
+
void get_data_from_usb(struct usart_config const *config)
{
struct queue const *uart_out = config->consumer.queue;
int c;
#ifdef BOARD_CR50
- /*
- * If EC-CR50 communication is on-going, then let's not forward
- * console input to EC for now.
- */
- if (ec_comm_is_uart_in_packet_mode(config->uart))
- return;
-#endif
+ if (config->uart == UART_EC) {
+ /*
+ * If USB-to-UART bridging is disabled, drop all input data.
+ * Otherwise, data could be pushed into UART TX FIFO, and
+ * transferred to EC eventually once EC-CR50 communication
+ * enables EC UART.
+ */
+ if (!ec_bridge_tx_enabled_)
+ return;
+
+ /*
+ * If EC-CR50 communication is on-going, then let's not forward
+ * console input to EC for now.
+ */
+ if (ec_comm_is_uart_in_packet_mode(UART_EC))
+ return;
+ }
+#endif /* BOARD_CR50 */
/* Copy output from buffer until TX fifo full or output buffer empty */
while (queue_count(uart_out) && QUEUE_REMOVE_UNITS(uart_out, &c, 1))
@@ -170,6 +208,14 @@ void send_data_to_usb(struct usart_config const *config)
tail = uart_in->state->tail & mask;
count = 0;
+#ifdef BOARD_CR50
+ /*
+ * If UART-to-USB bridging is not allowed, do not put any output
+ * data to uart_in queue.
+ */
+ if ((uart == UART_EC) && !ec_bridge_enabled_)
+ return;
+#endif /* BOARD_CR50 */
/*
* TODO(b/119329144): Process packet data separately,
* and filter console data based on ccd capability.
diff --git a/chip/g/usart.h b/chip/g/usart.h
index cd3a9cfe40..2d9f04974f 100644
--- a/chip/g/usart.h
+++ b/chip/g/usart.h
@@ -74,4 +74,13 @@ void get_data_from_usb(struct usart_config const *config);
/* Helper for UART bitbang mode. */
extern struct usart_config const ec_uart;
+/* Change EC UART-USB Bridge status */
+void uart_ec_bridge_enable(int enabled, int write);
+
+/* Return non-zero if EC UART-USB Bridge is enabled, or 0 otherwise */
+int uart_ec_bridge_is_enabled(void);
+
+/* Return non-zero if EC UART-USB Bridge is readwritable, or 0 otherwise */
+int uart_ec_bridge_tx_is_enabled(void);
+
#endif /* __CROS_FORWARD_UART_H */