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| author | Mary Ruthven <mruthven@chromium.org> | 2016-07-25 16:14:15 -0700 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2016-07-28 20:19:51 -0700 |
| commit | 2f256ad6982c55e18bc37e1b7e2e9e63b5d8e24b (patch) | |
| tree | 66f96965300eee247d7fa26061454a0d0e323590 /chip/g/registers.h | |
| parent | 893e1c0cb779f30839fa368a603b2838e03efdbf (diff) | |
| download | chrome-ec-2f256ad6982c55e18bc37e1b7e2e9e63b5d8e24b.tar.gz | |
cr50: fix wake pin handling when resuming from sleep
Cr50 was not waking up long enough after SPS_CS_L was asserted for the
spi slave transactions to start and disable sleep. It also was not
handling SYS_RST_L properly when it was asleep.
This change sets SPS_CS_L to be an edge triggered wake up source instead
of level triggered, because cr50 should just wake up on the edge and
disable sleep until the spi transaction is done.
It also adds sys_rst_l as a wakeup source. The sys_rst_asserted
interrupt cannot be triggered while cr50 is asleep, so the
pmu_wakeup_interrupt will call sys_rst_asserted if SYS_RST_L is low at
resume. This change relies on the EC extending the delay in
chipset_reset to be long enough for SYS_RST_L to still be asserted when
cr50 resumes.
BUG=chrome-os-partner:54331
BRANCH=none
TEST=manual
make sure suzyq is disconnected.
verify ap boots up to the kernel after running
'gpioset SYS_RST_L 0' then 'gpioset SYS_RST_L 1' on the ec
console.
Check that cr50 goes to sleep when the AP is not trying to use
the TPM.
When cr50 is asleep pwrbtn + refresh still resets the system.
Disable SYS_RST_L_IN as a wake source and verify the system
verification fails and requests a recovery image.
Change-Id: I807b1918842d96c9d2922aa33404d87ab28b9906
Signed-off-by: Mary Ruthven <mruthven@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/363606
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
Diffstat (limited to 'chip/g/registers.h')
| -rw-r--r-- | chip/g/registers.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/chip/g/registers.h b/chip/g/registers.h index 09bf4f07fa..7a47a9081a 100644 --- a/chip/g/registers.h +++ b/chip/g/registers.h @@ -185,8 +185,8 @@ static inline int x_uart_addr(int ch, int offset) /* Use these combinations in gpio.inc for clarity */ #define DIO_WAKE_HIGH (DIO_WAKE_EN0) #define DIO_WAKE_LOW (DIO_WAKE_EN0 | DIO_WAKE_INV0) -#define DIO_WAKE_RISING (DIO_WAKE_EN0 | DIO_WAKE_EDG0) -#define DIO_WAKE_FALLING (DIO_WAKE_EN0 | DIO_WAKE_EDG0 | DIO_WAKE_INV0) +#define DIO_WAKE_RISING (DIO_WAKE_EN0 | DIO_WAKE_EDGE0) +#define DIO_WAKE_FALLING (DIO_WAKE_EN0 | DIO_WAKE_EDGE0 | DIO_WAKE_INV0) /* Flags for pullup/pulldowns */ #define DIO_PULL_UP 0x0080 #define DIO_PULL_DOWN 0x0100 |