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authorAlexandru M Stan <amstan@chromium.org>2014-07-30 12:56:37 -0700
committerchrome-internal-fetch <chrome-internal-fetch@google.com>2014-08-11 22:05:01 +0000
commite7e66acd663a84dae9ab3b0d637466abec8dee2b (patch)
tree72f461a15421f0a3d907176d839041754bb7dfda /board
parentb2a426efaf7000ce6ed9074ef6c1000c694b82f6 (diff)
downloadchrome-ec-e7e66acd663a84dae9ab3b0d637466abec8dee2b.tar.gz
veyron: Porting to the new EC(STM32F071)
* Changed chip in build.mk * Renamed the Port H pins * Switched to 32bit timer * Remapped UART DMA Channel BUG=None TEST=Flash the new chip; UART Debug, SPI HC, I2C Battery should work. Everything else should work (besides power usage) BRANCH=None Change-Id: Ia73f3f6b4e8b7b42af4dfa592b7ff435ee379206 Signed-off-by: Alexandru M Stan <amstan@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/210522 Reviewed-by: Randall Spangler <rspangler@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Diffstat (limited to 'board')
-rw-r--r--board/veyron/board.c16
-rw-r--r--board/veyron/board.h13
-rw-r--r--board/veyron/build.mk6
-rw-r--r--board/veyron/gpio.inc20
4 files changed, 37 insertions, 18 deletions
diff --git a/board/veyron/board.c b/board/veyron/board.c
index e3bbf02914..a91a25c6a4 100644
--- a/board/veyron/board.c
+++ b/board/veyron/board.c
@@ -57,3 +57,19 @@ int board_discharge_on_ac(int enable)
{
return charger_discharge_on_ac(enable);
}
+
+void board_config_pre_init(void)
+{
+ /* enable SYSCFG clock */
+ STM32_RCC_APB2ENR |= 1 << 0;
+
+ /* Remap USART DMA to match the USART driver */
+ /*
+ * the DMA mapping is :
+ * Chan 2 : TIM1_CH1
+ * Chan 3 : SPI1_TX
+ * Chan 4 : USART1_TX
+ * Chan 5 : USART1_RX
+ */
+ STM32_SYSCFG_CFGR1 |= (1 << 9) | (1 << 10); /* Remap USART1 RX/TX DMA */
+}
diff --git a/board/veyron/board.h b/board/veyron/board.h
index 287189fa69..310e840f56 100644
--- a/board/veyron/board.h
+++ b/board/veyron/board.h
@@ -27,10 +27,15 @@
#define CONFIG_VBOOT_HASH
#define CONFIG_LED_COMMON
#define CONFIG_CHARGER_DISCHARGE_ON_AC
-#undef CONFIG_CONSOLE_CMDHELP
+#define CONFIG_BOARD_PRE_INIT
+#define CONFIG_STM_HWTIMER32
+#undef CONFIG_WATCHDOG_HELP
#ifndef __ASSEMBLER__
+/* 48 MHz SYSCLK clock frequency */
+#define CPU_CLOCK 48000000
+
/* Keyboard output port list */
#define KB_OUT_PORT_LIST GPIO_A, GPIO_B, GPIO_C
@@ -40,10 +45,8 @@
#define I2C_PORT_CHARGER I2C_PORT_MASTER
/* Timer selection */
-#define TIM_CLOCK_MSB 3
-#define TIM_CLOCK_LSB 9
-#define TIM_POWER_LED 2
-#define TIM_WATCHDOG 4
+#define TIM_CLOCK32 2
+#define TIM_WATCHDOG 4
#include "gpio_signal.h"
diff --git a/board/veyron/build.mk b/board/veyron/build.mk
index 0d22b8bcbe..a0f9570511 100644
--- a/board/veyron/build.mk
+++ b/board/veyron/build.mk
@@ -5,9 +5,9 @@
#
# Board specific files build
-# the IC is STmicro STM32L100RBT6
+# the IC is STmicro STM32F071RB
CHIP:=stm32
-CHIP_FAMILY:=stm32l
-CHIP_VARIANT:=stm32l15x
+CHIP_FAMILY:=stm32f0
+CHIP_VARIANT:=stm32f07x
board-y=board.o battery.o led.o
diff --git a/board/veyron/gpio.inc b/board/veyron/gpio.inc
index 865e3bbfab..c84e9836fc 100644
--- a/board/veyron/gpio.inc
+++ b/board/veyron/gpio.inc
@@ -28,11 +28,13 @@ GPIO(WP_L, B, 4, GPIO_INPUT, NULL)
/* Outputs */
GPIO(AP_RESET_H, B, 3, GPIO_OUT_HIGH, NULL)
+GPIO(BAT_LED0, B, 11, GPIO_OUT_LOW, NULL)
+GPIO(BAT_LED1, A, 11, GPIO_OUT_LOW, NULL)
+GPIO(EC_BL_OVERRIDE, F, 1, GPIO_OUT_HIGH, NULL)
GPIO(EC_INT, B, 9, GPIO_OUT_HIGH, NULL)
-GPIO(ENTERING_RW, H, 0, GPIO_OUT_LOW, NULL)
+GPIO(ENTERING_RW, F, 0, GPIO_OUT_LOW, NULL)
GPIO(I2C1_SCL, B, 6, GPIO_ODR_HIGH, NULL)
GPIO(I2C1_SDA, B, 7, GPIO_ODR_HIGH, NULL)
-GPIO(PMIC_PWRON_L, A, 12, GPIO_OUT_HIGH, NULL)
GPIO(KB_OUT00, B, 0, GPIO_KB_OUTPUT, NULL)
GPIO(KB_OUT01, B, 8, GPIO_KB_OUTPUT, NULL)
GPIO(KB_OUT02, B, 12, GPIO_KB_OUTPUT, NULL)
@@ -46,13 +48,11 @@ GPIO(KB_OUT09, B, 1, GPIO_KB_OUTPUT, NULL)
GPIO(KB_OUT10, C, 5, GPIO_KB_OUTPUT, NULL)
GPIO(KB_OUT11, C, 4, GPIO_KB_OUTPUT, NULL)
GPIO(KB_OUT12, A, 13, GPIO_KB_OUTPUT, NULL)
-GPIO(BAT_LED0, B, 11, GPIO_OUT_LOW, NULL)
-GPIO(BAT_LED1, A, 11, GPIO_OUT_LOW, NULL)
-GPIO(EC_BL_OVERRIDE, H, 1, GPIO_OUT_HIGH, NULL)
-GPIO(PMIC_SOURCE_PWR_H, B, 10, GPIO_OUT_LOW, NULL)
-GPIO(PMIC_WARM_RESET_L, C, 3, GPIO_OUT_HIGH, NULL)
+GPIO(PMIC_PWRON_L, A, 12, GPIO_OUT_HIGH, NULL)
+GPIO(PMIC_SOURCE_PWR_H, B, 10, GPIO_OUT_LOW, NULL)
GPIO(PMIC_USB_CTRL1_H, C, 6, GPIO_OUT_HIGH, NULL)
+GPIO(PMIC_WARM_RESET_L, C, 3, GPIO_OUT_HIGH, NULL)
-ALTERNATE(A, 0x00f0, GPIO_ALT_SPI, MODULE_SPI, GPIO_DEFAULT)
-ALTERNATE(A, 0x0600, GPIO_ALT_USART, MODULE_UART, GPIO_DEFAULT)
-ALTERNATE(B, 0x00c0, GPIO_ALT_I2C, MODULE_I2C, GPIO_DEFAULT)
+ALTERNATE(A, 0x00f0, 0, MODULE_SPI, 0)
+ALTERNATE(A, 0x0600, 1, MODULE_UART, 0)
+ALTERNATE(B, 0x00c0, 1, MODULE_I2C, 0)