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| author | Alec Berg <alecaberg@chromium.org> | 2014-11-13 10:51:49 -0800 |
|---|---|---|
| committer | chrome-internal-fetch <chrome-internal-fetch@google.com> | 2014-11-15 06:57:32 +0000 |
| commit | c44bd8b3a324148a898f865bcce1e6153bf3de8f (patch) | |
| tree | 34c8beeb0f383ab46872f5160c14f974ac3b828b /board/zinger/hardware.c | |
| parent | 56bbd902abb2219cb3ae42aa1546d0b6fc3a04a0 (diff) | |
| download | chrome-ec-c44bd8b3a324148a898f865bcce1e6153bf3de8f.tar.gz | |
pd: zinger: add firmware update alternate mode to zingerstabilize-6480.B
Add a Google Firmware Update alternate mode to zinger. This mode must
be entered in order to allow the unstructured VDMs that we use for
sending a new firmware.
BUG=chrome-os-partner:33754
BRANCH=samus
TEST=load on samus and zinger. see that "GFU" is printed on zinger console
to represent that it entered GFU mode. use twinkie to see that samus
sent discover identity, discover svids, discover modes, enter mode, and
then read info. See on samus pd console that we received result of read
info. from samus pd console with zinger attached:
> pe 1 dump
IDENT:
[ID Header] 2c0018d1 :: AMA, VID:18d1
[Cert Stat] 00000000
[2] 50100001 [3] 00000003 [4] 52136b91 [5] 0401137d
SVID[0]: 18d1 MODES: [1] 00000000
MODE[1]: svid:18d1 caps:00000000
Also, use a samus with cros_pd_update running in kernel, and see that zinger
auto-updates when plugged in. Performed 10 updates with no failures.
Change-Id: I8d4d38e4a9f649fe0889f688f262630ef55106ee
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/229622
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Diffstat (limited to 'board/zinger/hardware.c')
| -rw-r--r-- | board/zinger/hardware.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/board/zinger/hardware.c b/board/zinger/hardware.c index 1fca39a61e..59e2f8b24b 100644 --- a/board/zinger/hardware.c +++ b/board/zinger/hardware.c @@ -307,6 +307,9 @@ int flash_write_rw(int offset, int size, const char *data) int res = EC_SUCCESS; int i; + /* notify board of a RW flash contents change */ + board_rw_contents_change(); + if ((uint32_t)address > CONFIG_FLASH_BASE + CONFIG_FLASH_SIZE) return EC_ERROR_INVAL; @@ -358,6 +361,9 @@ int flash_erase_rw(void) int offset = CONFIG_FW_RW_OFF; int size = CONFIG_FW_RW_SIZE; + /* notify board of a RW flash contents change */ + board_rw_contents_change(); + /* unlock CR if needed */ if (STM32_FLASH_CR & CR_LOCK) { STM32_FLASH_KEYR = KEY1; |