Strago: Initial Version of Strago Board added.

   Modules that are enabled are listed below:
 - Power Sequencing
 - Keyboard Scan and Protocol
 - LPC to support Keyboard
 - Power Button Task
   ec.spi.bin has to be generated manualy using
   pack_ec.py

BUG=None
BRANCH=None
TEST=Tested on Stargo-Proto board

Change-Id: Ic5d504c3d6e9c7c5f3482fb7e9e37800b6274824
Signed-off-by: Divya Jyothi <divya.jyothi@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/226303
Reviewed-by: Vic Yang <victoryang@chromium.org>

5 files changed, 176 insertions, 0 deletions

diff --git a/board/strago/board.c b/board/strago/board.c
new file mode 100644
index 0000000000..1aa9762515
--- /dev/null
+++ b/board/strago/board.c
@@ -0,0 +1,28 @@
+/* Copyright (c) 2014 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+/* Strago board-specific configuration */
+
+#include "extpower.h"
+#include "gpio.h"
+#include "lid_switch.h"
+#include "power.h"
+#include "power_button.h"
+#include "registers.h"
+#include "util.h"
+
+#define GPIO_KB_INPUT (GPIO_INPUT | GPIO_PULL_UP)
+#define GPIO_KB_OUTPUT (GPIO_ODR_HIGH)
+#define GPIO_KB_OUTPUT_COL2 (GPIO_OUT_LOW)
+
+#include "gpio_list.h"
+
+/* power signal list.  Must match order of enum power_signal. */
+const struct power_signal_info power_signal_list[] = {
+	{GPIO_ALL_SYS_PGOOD,     1, "ALL_SYS_PWRGD"},
+	{GPIO_RSMRST_L_PGOOD,    1, "RSMRST_N_PWRGD"},
+	{GPIO_PCH_SLP_S3_L,      1, "SLP_S3#_DEASSERTED"},
+	{GPIO_PCH_SLP_S4_L,      1, "SLP_S4#_DEASSERTED"},
+};
+BUILD_ASSERT(ARRAY_SIZE(power_signal_list) == POWER_SIGNAL_COUNT);
diff --git a/board/strago/board.h b/board/strago/board.h
new file mode 100644
index 0000000000..fb28504850
--- /dev/null
+++ b/board/strago/board.h
@@ -0,0 +1,57 @@
+/* Copyright (c) 2014 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+/* Strago board configuration */
+
+#ifndef __BOARD_H
+#define __BOARD_H
+
+
+/* Optional features */
+#define CONFIG_SYSTEM_UNLOCKED  /* Allow dangerous commands */
+#define CONFIG_WATCHDOG_HELP
+#define CONFIG_CHIPSET_BRASWELL
+#define CONFIG_KEYBOARD_PROTOCOL_8042
+#define CONFIG_KEYBOARD_IRQ_GPIO GPIO_KBD_IRQ_L
+#define CONFIG_KEYBOARD_COL2_INVERTED
+#define CONFIG_POWER_BUTTON
+#define CONFIG_POWER_BUTTON_X86
+#define CONFIG_LID_SWITCH
+#define CONFIG_POWER_COMMON
+#define CONFIG_EXTPOWER_GPIO
+
+/* Modules we want to exclude */
+#undef CONFIG_EEPROM
+#undef CONFIG_EOPTION
+#undef CONFIG_PSTORE
+#undef CONFIG_PECI
+#undef CONFIG_SWITCH
+#undef CONFIG_I2C
+#undef CONFIG_PWM
+#undef CONFIG_FANS
+#undef CONFIG_ADC
+#undef CONFIG_WAKE_PIN
+#undef CONFIG_SPI
+#undef CONFIG_SPI_PORT
+#undef CONFIG_SPI_CS_GPIO
+
+#ifndef __ASSEMBLER__
+
+#include "gpio_signal.h"
+
+/* power signal definitions */
+enum power_signal {
+	X86_ALL_SYS_PWRGD = 0,
+	X86_RSMRST_L_PWRGD,
+	X86_SLP_S3_DEASSERTED,
+	X86_SLP_S4_DEASSERTED,
+
+	/* Number of X86 signals */
+	POWER_SIGNAL_COUNT
+};
+
+#endif /* !__ASSEMBLER__ */
+
+#endif /* __BOARD_H */
diff --git a/board/strago/build.mk b/board/strago/build.mk
new file mode 100644
index 0000000000..91ce24af42
--- /dev/null
+++ b/board/strago/build.mk
@@ -0,0 +1,12 @@
+# -*- makefile -*-
+# Copyright (c) 2014 The Chromium OS Authors. All rights reserved.
+# Use of this source code is governed by a BSD-style license that can be
+# found in the LICENSE file.
+#
+# Board specific files build
+#
+
+# the IC is SMSC MEC1322 / external SPI is 4MB / external clock is crystal
+CHIP:=mec1322
+
+board-y=board.o
diff --git a/board/strago/ec.tasklist b/board/strago/ec.tasklist
new file mode 100644
index 0000000000..bee345cf29
--- /dev/null
+++ b/board/strago/ec.tasklist
@@ -0,0 +1,26 @@
+/* Copyright (c) 2014 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+/**
+ * List of enabled tasks in the priority order
+ *
+ * The first one has the lowest priority.
+ *
+ * For each task, use the macro TASK_ALWAYS(n, r, d, s) for base tasks and
+ * TASK_NOTEST(n, r, d, s) for tasks that can be excluded in test binaries,
+ * where :
+ * 'n' in the name of the task
+ * 'r' in the main routine of the task
+ * 'd' in an opaque parameter passed to the routine at startup
+ * 's' is the stack size in bytes; must be a multiple of 8
+ */
+#define CONFIG_TASK_LIST \
+	TASK_ALWAYS(HOOKS, hook_task, NULL, TASK_STACK_SIZE) \
+	TASK_ALWAYS(HOSTCMD, host_command_task, NULL, TASK_STACK_SIZE) \
+	TASK_ALWAYS(POWERBTN, power_button_task, NULL, TASK_STACK_SIZE) \
+	TASK_NOTEST(KEYPROTO, keyboard_protocol_task, NULL, TASK_STACK_SIZE) \
+	TASK_NOTEST(KEYSCAN, keyboard_scan_task, NULL, TASK_STACK_SIZE) \
+	TASK_NOTEST(CHIPSET, chipset_task, NULL, TASK_STACK_SIZE) \
+	TASK_ALWAYS(CONSOLE, console_task, NULL, TASK_STACK_SIZE)
diff --git a/board/strago/gpio.inc b/board/strago/gpio.inc
new file mode 100644
index 0000000000..ab33ba9d8e
--- /dev/null
+++ b/board/strago/gpio.inc
@@ -0,0 +1,53 @@
+/* -*- mode:c -*-
+ *
+ * Copyright (c) 2014 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+GPIO(POWER_BUTTON_L,    PORT(3),  5, GPIO_INT_BOTH_DSLEEP,                      power_button_interrupt) /* Power button */
+GPIO(LID_OPEN,          PORT(2),  7, GPIO_INT_BOTH_DSLEEP,                      lid_interrupt)          /* Lid switch */
+GPIO(PCH_PWRBTN_L,      PORT(16), 0, GPIO_OUT_HIGH,                             NULL)                   /* Power button output to PCH */
+GPIO(STARTUP_LATCH_SET, PORT(4),  6, GPIO_OUT_HIGH,                             NULL)                   /* To enable power button detection */
+
+GPIO(AC_PRESENT,        PORT(3),  0, GPIO_INT_BOTH_DSLEEP,                      extpower_interrupt)     /* BC_ACOK / EC_ACIN - to know if battery or AC connected */
+GPIO(RSMRST_L_PGOOD,    PORT(6),  3, GPIO_INT_BOTH,                             power_signal_interrupt) /* RSMRST_N_PWRGD from power logic */
+GPIO(PCH_RSMRST_L,      PORT(14), 3, GPIO_OUT_LOW,                              NULL)                   /* RSMRST_N to PCH */
+GPIO(PCH_SLP_S4_L,      PORT(20), 0, GPIO_INT_BOTH_DSLEEP | GPIO_PULL_UP,       power_signal_interrupt) /* SLP_S4# signal from PCH */
+GPIO(PCH_SLP_S3_L,      PORT(20), 6, GPIO_INT_BOTH_DSLEEP | GPIO_PULL_UP,       power_signal_interrupt) /* SLP_S3# signal from PCH */
+GPIO(ALL_SYS_PGOOD,     PORT(13), 0, GPIO_INT_BOTH_DSLEEP,                      power_signal_interrupt) /* ALL_SYS_PWRGD from power logic */
+GPIO(PCH_SYS_PWROK,     PORT(6),  5, GPIO_OUT_LOW,                              NULL)                   /* EC thinks everything is up and ready (DELAY_ALL_SYS_PWRGD) */
+
+GPIO(USB3_PWR_EN,       PORT(5),  7, GPIO_OUT_HIGH,                             NULL)                   /* Enable power for USB3 Port */
+GPIO(USB2_PWR_EN,       PORT(3),  6, GPIO_OUT_HIGH,                             NULL)                   /* Enable power for USB2 Port */
+GPIO(USB_CTL1,          PORT(10), 5, GPIO_OUT_HIGH,                             NULL)                   /* USB charging mode control */
+GPIO(USB_ILIM_SEL,      PORT(1),  3, GPIO_OUT_HIGH,                             NULL)                   /* USB current control */
+
+GPIO(KBD_IRQ_L,         PORT(15), 2, GPIO_ODR_HIGH,                             NULL)                   /* Negative edge triggered irq. */
+
+UNIMPLEMENTED(CPU_PROCHOT)
+UNIMPLEMENTED(PCH_RCIN_L)
+
+GPIO(PCH_SMI_L,         PORT(4),  4, GPIO_ODR_HIGH,                             NULL)                   /* SMI output */
+GPIO(PCH_WAKE_L,        PORT(6),  6, GPIO_ODR_HIGH,                             NULL)                   /* PCH wake pin */
+GPIO(KBD_KSO2,          PORT(10), 1, GPIO_KB_OUTPUT_COL2,                       NULL)                   /* Negative edge triggered irq. */
+
+/*
+ * Signals which aren't implemented on MEC1322 eval board but we'll
+ * emulate anyway, to make it more convenient to debug other code.
+ */
+UNIMPLEMENTED(ENTERING_RW) /* EC entering RW code */
+
+/* Alternate functions GPIO definition */
+ALTERNATE(PORT(16), 0x24,     1, MODULE_UART,          0) 			/* UART0 */
+ALTERNATE(PORT(0),  0x3f,     3, MODULE_KEYBOARD_SCAN, GPIO_KB_OUTPUT)
+ALTERNATE(PORT(10), 0xdd,     3, MODULE_KEYBOARD_SCAN, GPIO_KB_OUTPUT)
+ALTERNATE(PORT(3),  0x04,     3, MODULE_KEYBOARD_SCAN, GPIO_KB_INPUT)
+ALTERNATE(PORT(4),  0x0d,     3, MODULE_KEYBOARD_SCAN, GPIO_KB_INPUT)
+ALTERNATE(PORT(12), 0x60,     2, MODULE_KEYBOARD_SCAN, GPIO_KB_INPUT)
+ALTERNATE(PORT(14), 0x14,     3, MODULE_KEYBOARD_SCAN, GPIO_KB_INPUT)
+ALTERNATE(PORT(1),  0x10,     1, MODULE_LPC,           0)                       /* 14: CLKRUN# */
+ALTERNATE(PORT(11), 0x9e,     1, MODULE_LPC,           0)                       /* 111~114:LAD[0:3],  117:PCI_CLK */
+ALTERNATE(PORT(11), 0x40,     1, MODULE_LPC,           GPIO_INT_BOTH)           /* 116: LRESET# */
+ALTERNATE(PORT(12), 0x01,     1, MODULE_LPC,           0)                       /* 120: LFRAME# */
+ALTERNATE(PORT(5),  0x10,     1, MODULE_SPI,           0)