diff options
author | scott worley <scott.worley@microchip.corp-partner.google.com> | 2018-05-10 18:50:55 -0400 |
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committer | chrome-bot <chrome-bot@chromium.org> | 2018-06-14 01:31:51 -0700 |
commit | fe921e8ea12abfaf889e8bdbf60666ce1c870f2b (patch) | |
tree | 1f1e8ff9d3bde5ce723157e76e565c7f6f35a2d5 /board/reef_mchp | |
parent | 532f93a432c06fcadf86bc0177dbb3e4c3abebb5 (diff) | |
download | chrome-ec-fe921e8ea12abfaf889e8bdbf60666ce1c870f2b.tar.gz |
board: Add reef_mchp board.
Create a new board reef_mchp based on production reef board
with original EC replaced with MEC1701 on interposer board.
BRANCH=none
BUG=none
TEST=Build and flash into board. Requires CoreBoot and
ChromiumOS rebuilt with cros_mec USE flag.
Change-Id: Ib93063586ca3b71f98d19c91d974138f880e5fd0
Signed-off-by: scott worley <scott.worley@microchip.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/1054729
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Tested-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Diffstat (limited to 'board/reef_mchp')
-rw-r--r-- | board/reef_mchp/battery.c | 700 | ||||
-rw-r--r-- | board/reef_mchp/board.c | 1232 | ||||
-rw-r--r-- | board/reef_mchp/board.h | 350 | ||||
-rw-r--r-- | board/reef_mchp/build.mk | 16 | ||||
-rw-r--r-- | board/reef_mchp/ec.tasklist | 46 | ||||
-rw-r--r-- | board/reef_mchp/gpio.inc | 340 | ||||
-rw-r--r-- | board/reef_mchp/led.c | 157 | ||||
-rw-r--r-- | board/reef_mchp/lfw/gpio.inc | 43 | ||||
-rw-r--r-- | board/reef_mchp/usb_pd_policy.c | 427 |
9 files changed, 3311 insertions, 0 deletions
diff --git a/board/reef_mchp/battery.c b/board/reef_mchp/battery.c new file mode 100644 index 0000000000..c557533c9d --- /dev/null +++ b/board/reef_mchp/battery.c @@ -0,0 +1,700 @@ +/* Copyright 2016 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + * + * Battery pack vendor provided charging profile + */ + +#include "battery.h" +#include "battery_smart.h" +#include "bd9995x.h" +#include "charge_ramp.h" +#include "charge_state.h" +#include "charger_profile_override.h" +#include "common.h" +#include "console.h" +#include "ec_commands.h" +#include "extpower.h" +#include "gpio.h" +#include "hooks.h" +#include "i2c.h" +#include "util.h" +#include "tfdp_chip.h" + +#define CPUTS(outstr) cputs(CC_CHARGER, outstr) +#define CPRINTS(format, args...) cprints(CC_CHARGER, format, ## args) + +enum battery_type { + BATTERY_SONY_CORP, + BATTERY_PANASONIC, + BATTERY_SMP_COS4870, + BATTERY_SMP_C22N1626, + BATTERY_CPT_C22N1626, + BATTERY_TYPE_COUNT, +}; + +enum fast_chg_voltage_ranges { + VOLTAGE_RANGE_0, + VOLTAGE_RANGE_1, + VOLTAGE_RANGE_2, +}; + +enum temp_range { + TEMP_RANGE_0, + TEMP_RANGE_1, + TEMP_RANGE_2, + TEMP_RANGE_3, + TEMP_RANGE_4, +}; + +struct ship_mode_info { + const int ship_mode_reg; + const int ship_mode_data; + int (*batt_init)(void); +}; + +struct board_batt_params { + const char *manuf_name; + const struct ship_mode_info *ship_mode_inf; + const struct battery_info *batt_info; + const struct fast_charge_params *fast_chg_params; +}; + +#define DEFAULT_BATTERY_TYPE BATTERY_SONY_CORP +#define SONY_DISCHARGE_DISABLE_FET_BIT (0x01 << 13) +#define PANASONIC_DISCHARGE_ENABLE_FET_BIT (0x01 << 14) +#define C22N1626_DISCHARGE_ENABLE_FET_BIT (0x01 << 0) + +/* keep track of previous charge profile info */ +static const struct fast_charge_profile *prev_chg_profile_info; + +static enum battery_present batt_pres_prev = BP_NOT_SURE; + +static enum battery_type board_battery_type = BATTERY_TYPE_COUNT; + +static const struct fast_charge_profile fast_charge_smp_cos4870_info[] = { + /* < 0C */ + [TEMP_RANGE_0] = { + .temp_c = TEMPC_TENTHS_OF_DEG(-1), + .current_mA = { + [VOLTAGE_RANGE_0] = 0, + [VOLTAGE_RANGE_1] = 0, + }, + }, + + /* 0C >= && <=15C */ + [TEMP_RANGE_1] = { + .temp_c = TEMPC_TENTHS_OF_DEG(15), + .current_mA = { + [VOLTAGE_RANGE_0] = 944, + [VOLTAGE_RANGE_1] = 472, + }, + }, + + /* 15C > && <=20C */ + [TEMP_RANGE_2] = { + .temp_c = TEMPC_TENTHS_OF_DEG(20), + .current_mA = { + [VOLTAGE_RANGE_0] = 1416, + [VOLTAGE_RANGE_1] = 1416, + }, + }, + + /* 20C > && <=45C */ + [TEMP_RANGE_3] = { + .temp_c = TEMPC_TENTHS_OF_DEG(45), + .current_mA = { + [VOLTAGE_RANGE_0] = 3300, + [VOLTAGE_RANGE_1] = 3300, + }, + }, + + /* > 45C */ + [TEMP_RANGE_4] = { + .temp_c = TEMPC_TENTHS_OF_DEG(CHARGER_PROF_TEMP_C_LAST_RANGE), + .current_mA = { + [VOLTAGE_RANGE_0] = 0, + [VOLTAGE_RANGE_1] = 0, + }, + }, +}; + +static const struct fast_charge_params fast_chg_params_smp_cos4870 = { + .total_temp_ranges = ARRAY_SIZE(fast_charge_smp_cos4870_info), + .default_temp_range_profile = TEMP_RANGE_2, + .voltage_mV = { + [VOLTAGE_RANGE_0] = 8000, + [VOLTAGE_RANGE_1] = CHARGER_PROF_VOLTAGE_MV_LAST_RANGE, + }, + .chg_profile_info = &fast_charge_smp_cos4870_info[0], +}; + +const struct battery_info batt_info_smp_cos4870 = { + .voltage_max = TARGET_WITH_MARGIN(8700, 5), + .voltage_normal = 7600, + /* + * Actual value 6000mV, added 100mV for charger accuracy so that + * unwanted low VSYS_Prochot# assertion can be avoided. + */ + .voltage_min = 6100, + .precharge_current = 256, /* mA */ + .start_charging_min_c = 0, + .start_charging_max_c = 46, + .charging_min_c = 0, + .charging_max_c = 45, + .discharging_min_c = 0, + .discharging_max_c = 60, +}; + +static const struct fast_charge_profile fast_charge_sonycorp_info[] = { + /* < 10C */ + [TEMP_RANGE_0] = { + .temp_c = TEMPC_TENTHS_OF_DEG(9), + .current_mA = { + [VOLTAGE_RANGE_0] = 1200, + [VOLTAGE_RANGE_1] = 1200, + }, + }, + + /* >= 10C */ + [TEMP_RANGE_1] = { + .temp_c = TEMPC_TENTHS_OF_DEG(CHARGER_PROF_TEMP_C_LAST_RANGE), + .current_mA = { + [VOLTAGE_RANGE_0] = 2250, + [VOLTAGE_RANGE_1] = 2250, + }, + }, +}; + +static const struct fast_charge_params fast_chg_params_sonycorp = { + .total_temp_ranges = ARRAY_SIZE(fast_charge_sonycorp_info), + .default_temp_range_profile = TEMP_RANGE_1, + .voltage_mV = { + [VOLTAGE_RANGE_0] = 8000, + [VOLTAGE_RANGE_1] = CHARGER_PROF_VOLTAGE_MV_LAST_RANGE, + }, + .chg_profile_info = &fast_charge_sonycorp_info[0], +}; + +const struct battery_info batt_info_sonycorp = { + .voltage_max = TARGET_WITH_MARGIN(8700, 5), + .voltage_normal = 7600, + + /* + * Actual value 6000mV, added 100mV for charger accuracy so that + * unwanted low VSYS_Prochot# assertion can be avoided. + */ + .voltage_min = 6100, + .precharge_current = 256, /* mA */ + .start_charging_min_c = 0, + .start_charging_max_c = 50, + .charging_min_c = 0, + .charging_max_c = 60, + .discharging_min_c = -20, + .discharging_max_c = 75, +}; + +static const struct fast_charge_profile fast_charge_panasonic_info[] = { + /* < 0C */ + [TEMP_RANGE_0] = { + .temp_c = TEMPC_TENTHS_OF_DEG(-1), + .current_mA = { + [VOLTAGE_RANGE_0] = 0, + [VOLTAGE_RANGE_1] = 0, + }, + }, + + /* 0C >= && <= 60C */ + [TEMP_RANGE_1] = { + .temp_c = TEMPC_TENTHS_OF_DEG(60), + .current_mA = { + [VOLTAGE_RANGE_0] = 3072, + [VOLTAGE_RANGE_1] = 3072, + }, + }, + + /* > 60C */ + [TEMP_RANGE_2] = { + .temp_c = TEMPC_TENTHS_OF_DEG(CHARGER_PROF_TEMP_C_LAST_RANGE), + .current_mA = { + [VOLTAGE_RANGE_0] = 0, + [VOLTAGE_RANGE_1] = 0, + }, + }, +}; + +static const struct fast_charge_params fast_chg_params_panasonic = { + .total_temp_ranges = ARRAY_SIZE(fast_charge_panasonic_info), + .default_temp_range_profile = TEMP_RANGE_1, + .voltage_mV = { + [VOLTAGE_RANGE_0] = 8000, + [VOLTAGE_RANGE_1] = CHARGER_PROF_VOLTAGE_MV_LAST_RANGE, + }, + .chg_profile_info = &fast_charge_panasonic_info[0], +}; + +const struct battery_info batt_info_panasoic = { + .voltage_max = TARGET_WITH_MARGIN(8800, 5), + .voltage_normal = 7700, + + /* + * Actual value 6000mV, added 100mV for charger accuracy so that + * unwanted low VSYS_Prochot# assertion can be avoided. + */ + .voltage_min = 6100, + .precharge_current = 256, /* mA */ + .start_charging_min_c = 0, + .start_charging_max_c = 50, + .charging_min_c = 0, + .charging_max_c = 60, + .discharging_min_c = -20, + .discharging_max_c = 75, +}; + +static const struct fast_charge_profile fast_charge_smp_c22n1626_info[] = { + /* < 1C */ + [TEMP_RANGE_0] = { + .temp_c = TEMPC_TENTHS_OF_DEG(0), + .current_mA = { + [VOLTAGE_RANGE_0] = 0, + [VOLTAGE_RANGE_1] = 0, + [VOLTAGE_RANGE_2] = 0, + }, + }, + + /* >=1C && <=10C */ + [TEMP_RANGE_1] = { + .temp_c = TEMPC_TENTHS_OF_DEG(10), + .current_mA = { + [VOLTAGE_RANGE_0] = 1752, + [VOLTAGE_RANGE_1] = 1752, + [VOLTAGE_RANGE_2] = 1752, + }, + }, + + /* 10C > && <=45C */ + [TEMP_RANGE_2] = { + .temp_c = TEMPC_TENTHS_OF_DEG(45), + .current_mA = { + [VOLTAGE_RANGE_0] = 4672, + [VOLTAGE_RANGE_1] = 4672, + [VOLTAGE_RANGE_2] = 2920, + }, + }, + + /* 45C > && <=60C */ + [TEMP_RANGE_3] = { + .temp_c = TEMPC_TENTHS_OF_DEG(60), + .current_mA = { + [VOLTAGE_RANGE_0] = 2920, + [VOLTAGE_RANGE_1] = 0, + [VOLTAGE_RANGE_2] = 0, + }, + }, + + /* > 60C */ + [TEMP_RANGE_4] = { + .temp_c = TEMPC_TENTHS_OF_DEG(CHARGER_PROF_TEMP_C_LAST_RANGE), + .current_mA = { + [VOLTAGE_RANGE_0] = 0, + [VOLTAGE_RANGE_1] = 0, + [VOLTAGE_RANGE_2] = 0, + }, + }, +}; + +static const struct fast_charge_params fast_chg_params_smp_c22n1626 = { + .total_temp_ranges = ARRAY_SIZE(fast_charge_smp_c22n1626_info), + .default_temp_range_profile = TEMP_RANGE_2, + .voltage_mV = { + [VOLTAGE_RANGE_0] = 8200, + [VOLTAGE_RANGE_1] = 8500, + [VOLTAGE_RANGE_2] = CHARGER_PROF_VOLTAGE_MV_LAST_RANGE, + }, + .chg_profile_info = &fast_charge_smp_c22n1626_info[0], +}; + +static const struct fast_charge_profile fast_charge_cpt_c22n1626_info[] = { + /* < 1C */ + [TEMP_RANGE_0] = { + .temp_c = TEMPC_TENTHS_OF_DEG(0), + .current_mA = { + [VOLTAGE_RANGE_0] = 0, + [VOLTAGE_RANGE_1] = 0, + [VOLTAGE_RANGE_2] = 0, + }, + }, + + /* >=1C && <=10C */ + [TEMP_RANGE_1] = { + .temp_c = TEMPC_TENTHS_OF_DEG(10), + .current_mA = { + [VOLTAGE_RANGE_0] = 1752, + [VOLTAGE_RANGE_1] = 1752, + [VOLTAGE_RANGE_2] = 1752, + }, + }, + + /* 10C > && <=45C */ + [TEMP_RANGE_2] = { + .temp_c = TEMPC_TENTHS_OF_DEG(45), + .current_mA = { + [VOLTAGE_RANGE_0] = 4600, + [VOLTAGE_RANGE_1] = 4600, + [VOLTAGE_RANGE_2] = 2920, + }, + }, + + /* 45C > && <=60C */ + [TEMP_RANGE_3] = { + .temp_c = TEMPC_TENTHS_OF_DEG(60), + .current_mA = { + [VOLTAGE_RANGE_0] = 2920, + [VOLTAGE_RANGE_1] = 0, + [VOLTAGE_RANGE_2] = 0, + }, + }, + + /* >60C */ + [TEMP_RANGE_4] = { + .temp_c = TEMPC_TENTHS_OF_DEG(CHARGER_PROF_TEMP_C_LAST_RANGE), + .current_mA = { + [VOLTAGE_RANGE_0] = 0, + [VOLTAGE_RANGE_1] = 0, + [VOLTAGE_RANGE_2] = 0, + }, + }, +}; + +static const struct fast_charge_params fast_chg_params_cpt_c22n1626 = { + .total_temp_ranges = ARRAY_SIZE(fast_charge_cpt_c22n1626_info), + .default_temp_range_profile = TEMP_RANGE_2, + .voltage_mV = { + [VOLTAGE_RANGE_0] = 8200, + [VOLTAGE_RANGE_1] = 8500, + [VOLTAGE_RANGE_2] = CHARGER_PROF_VOLTAGE_MV_LAST_RANGE, + }, + .chg_profile_info = &fast_charge_cpt_c22n1626_info[0], +}; + +const struct battery_info batt_info_c22n1626 = { + .voltage_max = TARGET_WITH_MARGIN(8800, 5), + .voltage_normal = 7700, + + /* + * Actual value 6000mV, added 100mV for charger accuracy so that + * unwanted low VSYS_Prochot# assertion can be avoided. + */ + .voltage_min = 6100, + .precharge_current = 256, /* mA */ + .start_charging_min_c = 0, + .start_charging_max_c = 45, + .charging_min_c = 0, + .charging_max_c = 60, + .discharging_min_c = 0, + .discharging_max_c = 60, +}; + +static int batt_smp_cos4870_init(void) +{ + int batt_status; + + return battery_status(&batt_status) ? 0 : + batt_status & STATUS_INITIALIZED; +} + +static int batt_sony_corp_init(void) +{ + int batt_status; + + /* + * SB_MANUFACTURER_ACCESS: + * [13] : Discharging Disabled + * : 0b - Allowed to Discharge + * : 1b - Not Allowed to Discharge + */ + return sb_read(SB_MANUFACTURER_ACCESS, &batt_status) ? 0 : + !(batt_status & SONY_DISCHARGE_DISABLE_FET_BIT); +} + +static int batt_panasonic_init(void) +{ + int batt_status; + + /* + * SB_MANUFACTURER_ACCESS: + * [14] : Discharging Disabled + * : 0b - Not Allowed to Discharge + * : 1b - Allowed to Discharge + */ + return sb_read(SB_MANUFACTURER_ACCESS, &batt_status) ? 0 : + !!(batt_status & PANASONIC_DISCHARGE_ENABLE_FET_BIT); +} + +static int batt_c22n1626_init(void) +{ + int batt_status; + + /* + * SB_PACK_STATUS: + * [0] : Discharging Enabled + * : 0b - Not Allowed to Discharge + * : 1b - Allowed to Discharge + */ + return sb_read(SB_PACK_STATUS, &batt_status) ? 0 : + !!(batt_status & C22N1626_DISCHARGE_ENABLE_FET_BIT); +} + +static const struct ship_mode_info ship_mode_info_smp_cos4870 = { + .ship_mode_reg = 0x00, + .ship_mode_data = 0x0010, + .batt_init = batt_smp_cos4870_init, +}; + +static const struct ship_mode_info ship_mode_info_sonycorp = { + .ship_mode_reg = 0x3A, + .ship_mode_data = 0xC574, + .batt_init = batt_sony_corp_init, +}; + +static const struct ship_mode_info ship_mode_info_panasonic = { + .ship_mode_reg = 0x3A, + .ship_mode_data = 0xC574, + .batt_init = batt_panasonic_init, +}; + +static const struct ship_mode_info ship_mode_info_c22n1626 = { + .ship_mode_reg = 0x00, + .ship_mode_data = 0x0010, + .batt_init = batt_c22n1626_init, +}; + +static const struct board_batt_params info[] = { + /* BQ40Z555 SONY CORP BATTERY battery specific configurations */ + [BATTERY_SONY_CORP] = { + .manuf_name = "SONYCorp", + .ship_mode_inf = &ship_mode_info_sonycorp, + .fast_chg_params = &fast_chg_params_sonycorp, + .batt_info = &batt_info_sonycorp, + }, + + /* RAJ240045 Panasoic battery specific configurations */ + [BATTERY_PANASONIC] = { + .manuf_name = "PANASONIC", + .ship_mode_inf = &ship_mode_info_panasonic, + .fast_chg_params = &fast_chg_params_panasonic, + .batt_info = &batt_info_panasoic, + }, + + /* BQ40Z55 SMP COS4870 BATTERY battery specific configurations */ + [BATTERY_SMP_COS4870] = { + .manuf_name = "SMP-COS4870", + .ship_mode_inf = &ship_mode_info_smp_cos4870, + .fast_chg_params = &fast_chg_params_smp_cos4870, + .batt_info = &batt_info_smp_cos4870, + }, + + /* BQ40Z55 SMP C22N1626 BATTERY battery specific configurations */ + [BATTERY_SMP_C22N1626] = { + .manuf_name = "AS1FNZD3KD", + .ship_mode_inf = &ship_mode_info_c22n1626, + .fast_chg_params = &fast_chg_params_smp_c22n1626, + .batt_info = &batt_info_c22n1626, + }, + + /* BQ40Z55 CPT C22N1626 BATTERY battery specific configurations */ + [BATTERY_CPT_C22N1626] = { + .manuf_name = "AS1FOAD3KD", + .ship_mode_inf = &ship_mode_info_c22n1626, + .fast_chg_params = &fast_chg_params_cpt_c22n1626, + .batt_info = &batt_info_c22n1626, + }, +}; +BUILD_ASSERT(ARRAY_SIZE(info) == BATTERY_TYPE_COUNT); + +static inline const struct board_batt_params *board_get_batt_params(void) +{ + return &info[board_battery_type == BATTERY_TYPE_COUNT ? + DEFAULT_BATTERY_TYPE : board_battery_type]; +} + +enum battery_present battery_hw_present(void) +{ + int bp; + + /* The GPIO is low when the battery is physically present */ + bp = gpio_get_level(GPIO_EC_BATT_PRES_L); + return bp ? BP_NO : BP_YES; +} + +/* Get type of the battery connected on the board */ +static int board_get_battery_type(void) +{ + const struct fast_charge_params *chg_params; + char name[32]; + int i; + + if (!battery_manufacturer_name(name, sizeof(name))) { + for (i = 0; i < BATTERY_TYPE_COUNT; i++) { + if (!strcasecmp(name, info[i].manuf_name)) { + board_battery_type = i; + break; + } + } + } + + /* Initialize fast charging parameters */ + chg_params = board_get_batt_params()->fast_chg_params; + prev_chg_profile_info = &chg_params->chg_profile_info[ + chg_params->default_temp_range_profile]; + + return board_battery_type; +} + +/* + * Initialize the battery type for the board. + * + * Very first battery info is called by the charger driver to initialize + * the charger parameters hence initialize the battery type for the board + * as soon as the I2C is initialized. + */ +static void board_init_battery_type(void) +{ + if (board_get_battery_type() != BATTERY_TYPE_COUNT) + CPRINTS("found batt:%s", + info[board_battery_type].manuf_name); + else + CPUTS("battery not found"); +} +DECLARE_HOOK(HOOK_INIT, board_init_battery_type, HOOK_PRIO_INIT_I2C + 1); + +const struct battery_info *battery_get_info(void) +{ + return board_get_batt_params()->batt_info; +} + +int board_cut_off_battery(void) +{ + int rv; + const struct ship_mode_info *ship_mode_inf = + board_get_batt_params()->ship_mode_inf; + + /* Ship mode command must be sent twice to take effect */ + rv = sb_write(ship_mode_inf->ship_mode_reg, + ship_mode_inf->ship_mode_data); + if (rv != EC_SUCCESS) + return rv; + + rv = sb_write(ship_mode_inf->ship_mode_reg, + ship_mode_inf->ship_mode_data); + + return rv; +} + +static int charger_should_discharge_on_ac(struct charge_state_data *curr) +{ + /* can not discharge on AC without battery */ + if (curr->batt.is_present != BP_YES) + return 0; + + /* Do not discharge on AC if the battery is still waking up */ + if (!(curr->batt.flags & BATT_FLAG_WANT_CHARGE) && + !(curr->batt.status & STATUS_FULLY_CHARGED)) + return 0; + + /* + * In light load (<450mA being withdrawn from VSYS) the DCDC of the + * charger operates intermittently i.e. DCDC switches continuously + * and then stops to regulate the output voltage and current, and + * sometimes to prevent reverse current from flowing to the input. + * This causes a slight voltage ripple on VSYS that falls in the + * audible noise frequency (single digit kHz range). This small + * ripple generates audible noise in the output ceramic capacitors + * (caps on VSYS and any input of DCDC under VSYS). + * + * To overcome this issue enable the battery learning operation + * and suspend USB charging and DC/DC converter. + */ + if (!battery_is_cut_off() && + !(curr->batt.flags & BATT_FLAG_WANT_CHARGE) && + (curr->batt.status & STATUS_FULLY_CHARGED)) + return 1; + + /* + * To avoid inrush current from the external charger, enable + * discharge on AC till the new charger is detected and charge + * detect delay has passed. + */ + if (!chg_ramp_is_detected() && curr->batt.state_of_charge > 2) + return 1; + + return 0; +} + +/* + * This can override the smart battery's charging profile. To make a change, + * modify one or more of requested_voltage, requested_current, or state. + * Leave everything else unchanged. + * + * Return the next poll period in usec, or zero to use the default (which is + * state dependent). + */ +int charger_profile_override(struct charge_state_data *curr) +{ + int disch_on_ac = charger_should_discharge_on_ac(curr); + + charger_discharge_on_ac(disch_on_ac); + + if (disch_on_ac) { + curr->state = ST_DISCHARGE; + return 0; + } + + return charger_profile_override_common(curr, + board_get_batt_params()->fast_chg_params, + &prev_chg_profile_info, + board_get_batt_params()->batt_info->voltage_max); +} + +/* + * Physical detection of battery. + */ +enum battery_present battery_is_present(void) +{ + enum battery_present batt_pres; + + /* Get the physical hardware status */ + batt_pres = battery_hw_present(); + + /* + * Make sure battery status is implemented, I2C transactions are + * success & the battery status is Initialized to find out if it + * is a working battery and it is not in the cut-off mode. + * + * If battery I2C fails but VBATT is high, battery is booting from + * cut-off mode. + * + * FETs are turned off after Power Shutdown time. + * The device will wake up when a voltage is applied to PACK. + * Battery status will be inactive until it is initialized. + */ + if (batt_pres == BP_YES && batt_pres_prev != batt_pres && + !battery_is_cut_off()) { + /* Re-init board battery if battery presence status changes */ + if (board_get_battery_type() == BATTERY_TYPE_COUNT) { + if (bd9995x_get_battery_voltage() >= + board_get_batt_params()->batt_info->voltage_min) + batt_pres = BP_NO; + } else if (!board_get_batt_params()->ship_mode_inf->batt_init()) + batt_pres = BP_NO; + } + + batt_pres_prev = batt_pres; + + return batt_pres; +} + +int board_battery_initialized(void) +{ + return (battery_hw_present() == batt_pres_prev); +} diff --git a/board/reef_mchp/board.c b/board/reef_mchp/board.c new file mode 100644 index 0000000000..4efe7dcdb3 --- /dev/null +++ b/board/reef_mchp/board.c @@ -0,0 +1,1232 @@ +/* Copyright 2016 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/* Reef board-specific configuration */ + +#include "adc.h" +#include "adc_chip.h" +#include "als.h" +#include "button.h" +#include "charge_manager.h" +#include "charge_ramp.h" +#include "charge_state.h" +#include "charger.h" +#include "chipset.h" +#include "console.h" +#include "driver/als_opt3001.h" +#include "driver/accel_kionix.h" +#include "driver/accel_kx022.h" +#include "driver/accelgyro_bmi160.h" +#include "driver/baro_bmp280.h" +#include "driver/charger/bd9995x.h" +#include "driver/tcpm/anx74xx.h" +#include "driver/tcpm/ps8xxx.h" +#include "driver/tcpm/tcpci.h" +#include "driver/tcpm/tcpm.h" +#include "extpower.h" +#include "gpio.h" +#include "hooks.h" +#include "host_command.h" +#include "i2c.h" +#include "keyboard_scan.h" +#include "lid_angle.h" +#include "lid_switch.h" +#include "math_util.h" +#include "motion_sense.h" +#include "motion_lid.h" +#include "power.h" +#include "power_button.h" +#include "pwm.h" +#include "pwm_chip.h" +#include "lpc_chip.h" +#include "spi.h" +#include "spi_chip.h" +#include "switch.h" +#include "system.h" +#include "tablet_mode.h" +#include "task.h" +#include "temp_sensor.h" +#include "tfdp_chip.h" +#include "thermistor.h" +#include "timer.h" +#include "uart.h" +#include "usb_charge.h" +#include "usb_mux.h" +#include "usb_pd.h" +#include "usb_pd_tcpm.h" +#include "util.h" + + +#define CPUTS(outstr) cputs(CC_USBCHARGE, outstr) +#define CPRINTS(format, args...) cprints(CC_USBCHARGE, format, ## args) +#define CPRINTF(format, args...) cprintf(CC_USBCHARGE, format, ## args) + +#define IN_ALL_SYS_PG POWER_SIGNAL_MASK(X86_ALL_SYS_PG) +#define IN_PGOOD_PP3300 POWER_SIGNAL_MASK(X86_PGOOD_PP3300) +#define IN_PGOOD_PP5000 POWER_SIGNAL_MASK(X86_PGOOD_PP5000) + +#define USB_PD_PORT_ANX74XX 0 +#define USB_PD_PORT_PS8751 1 + +#ifdef CONFIG_BOARD_PRE_INIT +/* + * reefmchp - requires changing + * VTR1 pin domain = 3.3V + * VTR2 pin domain = 1.8V + * VTR3 pin domain = 3.3V + */ +void board_config_pre_init(void) +{ + MCHP_EC_GPIO_BANK_PWR = MCHP_EC_GPIO_BANK_PWR_VTR2_18; + +#ifdef CONFIG_LOW_POWER_IDLE + /* DEBUG - GPIO_0060 becomes 48MHZ_OUT + * MEC1701 interposer J47-7 + */ + gpio_config_module(MODULE_CHIPSET, 1); +#endif +} +#endif + +/* + * NOTES: The PD GPIO's are armed for falling edge. + * There is a potential race condition in this routine. + * ISR calls this routine and it reads state of GPIO pin. + * If GPIO is still asserted low, this routine will do nothing. + * If this routine samples GPIO after it returns high then it + * will wake the PDCMD task. + */ +static void tcpc_alert_event(enum gpio_signal signal) +{ + if ((signal == GPIO_USB_C0_PD_INT_ODL) && + !gpio_get_level(GPIO_USB_C0_PD_RST_L)) + return; + + if ((signal == GPIO_USB_C1_PD_INT_ODL) && + !gpio_get_level(GPIO_USB_C1_PD_RST_ODL)) + return; + +#ifdef HAS_TASK_PDCMD + /* Exchange status with TCPCs */ + host_command_pd_send_status(PD_CHARGE_NO_CHANGE); +#endif +} + +#ifdef CONFIG_USB_PD_TCPC_LOW_POWER +static void anx74xx_cable_det_handler(void) +{ + int cable_det = gpio_get_level(GPIO_USB_C0_CABLE_DET); + int reset_n = gpio_get_level(GPIO_USB_C0_PD_RST_L); + + /* + * A cable_det low->high transition was detected. If following the + * debounce time, cable_det is high, and reset_n is low, then ANX3429 is + * currently in standby mode and needs to be woken up. Set the + * TCPC_RESET event which will bring the ANX3429 out of standby + * mode. Setting this event is gated on reset_n being low because the + * ANX3429 will always set cable_det when transitioning to normal mode + * and if in normal mode, then there is no need to trigger a tcpc reset. + */ + if (cable_det && !reset_n) + task_set_event(TASK_ID_PD_C0, PD_EVENT_TCPC_RESET, 0); +} +DECLARE_DEFERRED(anx74xx_cable_det_handler); +/* from firmware-reef-9042.B */ +DECLARE_HOOK(HOOK_CHIPSET_RESUME, anx74xx_cable_det_handler, HOOK_PRIO_LAST); + +void anx74xx_cable_det_interrupt(enum gpio_signal signal) +{ + /* debounce for 2 msec */ + hook_call_deferred(&anx74xx_cable_det_handler_data, (2 * MSEC)); +} +#endif + +/* + * enable_input_devices() is called by the tablet_mode ISR, but changes the + * state of GPIOs, so its definition must reside after including gpio_list. + * Use DECLARE_DEFERRED to generate enable_input_devices_data. + */ +static void enable_input_devices(void); +DECLARE_DEFERRED(enable_input_devices); + +#define LID_DEBOUNCE_US (30 * MSEC) /* Debounce time for lid switch */ +void tablet_mode_interrupt(enum gpio_signal signal) +{ + hook_call_deferred(&enable_input_devices_data, LID_DEBOUNCE_US); +} + +#include "gpio_list.h" + +/* power signal list. Must match order of enum power_signal. */ +const struct power_signal_info power_signal_list[] = { +#ifdef CONFIG_POWER_S0IX + {GPIO_PCH_SLP_S0_L, + POWER_SIGNAL_ACTIVE_HIGH | POWER_SIGNAL_DISABLE_AT_BOOT, + "SLP_S0_DEASSERTED"}, +#endif + {GPIO_RSMRST_L_PGOOD, POWER_SIGNAL_ACTIVE_HIGH, + "RSMRST_L"}, + {GPIO_PCH_SLP_S3_L, POWER_SIGNAL_ACTIVE_HIGH, + "SLP_S3_DEASSERTED"}, + {GPIO_PCH_SLP_S4_L, POWER_SIGNAL_ACTIVE_HIGH, + "SLP_S4_DEASSERTED"}, + {GPIO_SUSPWRNACK, POWER_SIGNAL_ACTIVE_HIGH, + "SUSPWRNACK_DEASSERTED"}, + {GPIO_ALL_SYS_PGOOD, POWER_SIGNAL_ACTIVE_HIGH, + "ALL_SYS_PGOOD"}, + {GPIO_PP3300_PG, POWER_SIGNAL_ACTIVE_HIGH, "PP3300_PG"}, + {GPIO_PP5000_PG, POWER_SIGNAL_ACTIVE_HIGH, "PP5000_PG"}, +}; +BUILD_ASSERT(ARRAY_SIZE(power_signal_list) == POWER_SIGNAL_COUNT); + +/* SPI devices */ +const struct spi_device_t spi_devices[] = { + { QMSPI0_PORT, 4, GPIO_QMSPI_CS0}, +#if defined(CONFIG_SPI_ACCEL_PORT) + { GPSPI0_PORT, 2, GPIO_SPI0_CS0 }, +#endif +}; +const unsigned int spi_devices_used = ARRAY_SIZE(spi_devices); + +/* ADC channels */ +/* chip/mchp defined adc_t + * name, factor_mul, factor_div, shift, channel + * Signals routed through interposer to MEC17xx ADC channels. + */ +const struct adc_t adc_channels[] = { + /* Vref = 3.000V, 10-bit unsigned reading */ + [ADC_TEMP_SENSOR_CHARGER] = { + "CHARGER", 3000, 1024, 0, 0 + }, + [ADC_TEMP_SENSOR_AMB] = { + "AMBIENT", 3000, 1024, 0, 1 + }, + [ADC_BOARD_ID] = { + "BRD_ID", 3000, 1024, 0, 2 + }, +}; +BUILD_ASSERT(ARRAY_SIZE(adc_channels) == ADC_CH_COUNT); + +/* PWM channels. Must be in the exactly same order as in enum pwm_channel. */ +#ifdef CONFIG_PWM +const struct pwm_t pwm_channels[] = { + /* channel, flags */ + [PWM_CH_LED_GREEN] = { 4, PWM_CONFIG_DSLEEP }, + [PWM_CH_LED_RED] = { 5, PWM_CONFIG_DSLEEP }, +}; +BUILD_ASSERT(ARRAY_SIZE(pwm_channels) == PWM_CH_COUNT); +#endif /* #ifdef CONFIG_PWM */ + +/* + * Using Ports 3, 6, 7 from board.h + * Using Ports 0, 2 from board.c + * Due to added RC of interposer board temporarily reduce + * 400 to 100 kHz. + */ +const struct i2c_port_t i2c_ports[] = { + {"tcpc0", MCHP_I2C_PORT0, 400, + GPIO_EC_I2C_USB_C0_PD_SCL, GPIO_EC_I2C_USB_C0_PD_SDA}, + {"tcpc1", MCHP_I2C_PORT2, 400, + GPIO_EC_I2C_USB_C1_PD_SCL, GPIO_EC_I2C_USB_C1_PD_SDA}, + {"accelgyro", I2C_PORT_GYRO, 400, + GPIO_EC_I2C_GYRO_SCL, GPIO_EC_I2C_GYRO_SDA}, + {"sensors", MCHP_I2C_PORT7, 400, + GPIO_EC_I2C_SENSOR_SCL, GPIO_EC_I2C_SENSOR_SDA}, + {"batt", MCHP_I2C_PORT3, 100, + GPIO_EC_I2C_POWER_SCL, GPIO_EC_I2C_POWER_SDA}, +}; +const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports); + +/* + * Map ports to controller. + * Ports may map to the same controller. + * Both USB PD ports are mapped to CTRL0. + */ +const uint16_t i2c_port_to_ctrl[I2C_PORT_COUNT] = { + (MCHP_I2C_CTRL0 << 8) + MCHP_I2C_PORT0, + (MCHP_I2C_CTRL0 << 8) + MCHP_I2C_PORT2, + (MCHP_I2C_CTRL1 << 8) + I2C_PORT_GYRO, + (MCHP_I2C_CTRL2 << 8) + MCHP_I2C_PORT3, + (MCHP_I2C_CTRL3 << 8) + MCHP_I2C_PORT7, +}; + +/* + * Used by chip level I2C controller initialization. + * Board level can specify two unused I2C addresses + * for each controller. Current chip level disables + * controller response to address 0(general call). + */ +const uint32_t i2c_ctrl_slave_addrs[I2C_CONTROLLER_COUNT] = { + 0, 0, 0, 0, +}; + +/* Return the two slave addresses the specified + * controller will respond to when controller + * is acting as a slave. + * b[6:0] = b[7:1] of I2C address 1 + * b[14:8] = b[7:1] of I2C address 2 + * When not using I2C controllers as slaves we can use + * the same value for all controllers. The address should + * not be 0x00 as this is the general call address. + */ +uint16_t board_i2c_slave_addrs(int controller) +{ + int i; + + for (i = 0; i < I2C_CONTROLLER_COUNT; i++) + if ((i2c_ctrl_slave_addrs[i] & 0xffff) == controller) + return (i2c_ctrl_slave_addrs[i] >> 16); + + return 0; /* general call address */ +} + +/* + * default to I2C0 because callers may not check + * return value if we returned an error code. + */ +int board_i2c_p2c(int port) +{ + int i; + + for (i = 0; i < I2C_PORT_COUNT; i++) + if ((i2c_port_to_ctrl[i] & 0xFF) == port) + return (int)(i2c_port_to_ctrl[i] >> 8); + + return -1; +} + +#ifdef CONFIG_CMD_I2C_STRESS_TEST +struct i2c_stress_test i2c_stress_tests[] = { + +#ifdef CONFIG_CMD_I2C_STRESS_TEST_TCPC + { + .port = MCHP_I2C_PORT0, + .addr = 0x50, + .i2c_test = &anx74xx_i2c_stress_test_dev, + }, +#endif + +#ifdef CONFIG_CMD_I2C_STRESS_TEST_TCPC + { + .port = MCHP_I2C_PORT2, + .addr = 0x16, + .i2c_test = &ps8xxx_i2c_stress_test_dev, + }, +#endif +#ifdef CONFIG_CMD_I2C_STRESS_TEST_ACCEL + { + .port = I2C_PORT_GYRO, + .addr = BMI160_ADDR0, + .i2c_test = &bmi160_i2c_stress_test_dev, + }, +#endif +#ifdef CONFIG_CMD_I2C_STRESS_TEST_ACCEL + { + .port = I2C_PORT_BARO, + .addr = BMP280_I2C_ADDRESS1, + .i2c_test = &bmp280_i2c_stress_test_dev, + }, + { + .port = I2C_PORT_LID_ACCEL, + .addr = KX022_ADDR1, + .i2c_test = &kionix_i2c_stress_test_dev, + }, +#endif +#ifdef CONFIG_CMD_I2C_STRESS_TEST_ALS + { + .port = I2C_PORT_ALS, + .addr = OPT3001_I2C_ADDR1, + .i2c_test = &opt3001_i2c_stress_test_dev, + }, +#endif +/* MCHP_I2C_PORT3 */ +#ifdef CONFIG_CMD_I2C_STRESS_TEST_BATTERY + { + .i2c_test = &battery_i2c_stress_test_dev, + }, +#endif +/* MCHP_I2C_PORT3 */ +#ifdef CONFIG_CMD_I2C_STRESS_TEST_CHARGER + { + .i2c_test = &bd9995x_i2c_stress_test_dev, + }, +#endif +}; +const int i2c_test_dev_used = ARRAY_SIZE(i2c_stress_tests); +#endif /* CONFIG_CMD_I2C_STRESS_TEST */ + +const struct tcpc_config_t tcpc_config[CONFIG_USB_PD_PORT_COUNT] = { + [USB_PD_PORT_ANX74XX] = { + .i2c_host_port = MCHP_I2C_PORT0, + .i2c_slave_addr = 0x50, + .drv = &anx74xx_tcpm_drv, + .pol = TCPC_ALERT_ACTIVE_LOW, + }, + [USB_PD_PORT_PS8751] = { + .i2c_host_port = MCHP_I2C_PORT2, + .i2c_slave_addr = 0x16, + .drv = &ps8xxx_tcpm_drv, + .pol = TCPC_ALERT_ACTIVE_LOW, + }, +}; + +uint16_t tcpc_get_alert_status(void) +{ + uint16_t status = 0; + + if (!gpio_get_level(GPIO_USB_C0_PD_INT_ODL)) { + if (gpio_get_level(GPIO_USB_C0_PD_RST_L)) + status |= PD_STATUS_TCPC_ALERT_0; + } + + if (!gpio_get_level(GPIO_USB_C1_PD_INT_ODL)) { + if (gpio_get_level(GPIO_USB_C1_PD_RST_ODL)) + status |= PD_STATUS_TCPC_ALERT_1; + } + + return status; +} + +const enum gpio_signal hibernate_wake_pins[] = { + GPIO_AC_PRESENT, + GPIO_LID_OPEN, + GPIO_POWER_BUTTON_L, +}; + +const int hibernate_wake_pins_used = ARRAY_SIZE(hibernate_wake_pins); + +/* + * PS8751 TCPM DRP low power idle behavour is causing I2C errors. + * Upon receiving DRP low power idle command, PS8751 holds SCL and + * SDA low for ~480us. It simultaneously releases both pins which is + * defined as a bus error condition by I2C spec. No ACK received. + * TCPCI spec. states waking any TCPM requires sending any dummy + * I2C command which the TCPM will NACK. The I2C master MUST wait + * a minimum of 5 ms after the NACK before sending another I2C + * command. We observe the PD task and TCPCI state machines do not + * follow the TCPCI spec. Sometimes this routine is called to wake + * the PS8751 after it has been put into low power idle and sometimes + * the PD/TCPCI state machine doesn't call this routine and tries + * communicating with PS8751. This results in lots of I2C retries and + * results taking up to 10ms before I2C communication with PS8751 + * is stable. Don't know how to fix this. + */ +static int ps8751_tune_mux(const struct usb_mux *mux) +{ + int rv; + + /* 0x98 sets lower EQ of DP port (4.5db) */ + rv = i2c_write8(MCHP_I2C_PORT2, 0x16, + PS8XXX_REG_MUX_DP_EQ_CONFIGURATION, 0x98); + + /* TCPCI spec. delay msleep(6); */ + + return rv; +} + +/* + * USB_PD_PORT_ANX74XX and USB_PD_PORT_PS8751 are zero based indices into + * tcpc_config array. The tcpc_config array contains the actual EC I2C + * port, device slave address, and a function pointer into the driver code. + */ +struct usb_mux usb_muxes[CONFIG_USB_PD_PORT_COUNT] = { + [USB_PD_PORT_ANX74XX] = { + .port_addr = USB_PD_PORT_ANX74XX, + .driver = &anx74xx_tcpm_usb_mux_driver, + .hpd_update = &anx74xx_tcpc_update_hpd_status, + }, + [USB_PD_PORT_PS8751] = { + .port_addr = USB_PD_PORT_PS8751, + .driver = &tcpci_tcpm_usb_mux_driver, + .hpd_update = &ps8xxx_tcpc_update_hpd_status, + .board_init = &ps8751_tune_mux, + } +}; + +/* MCHP + * New, not in firmware-reef-9042.B + */ +const int usb_port_enable[CONFIG_USB_PORT_POWER_SMART_PORT_COUNT] = { + GPIO_USB1_ENABLE, +}; + +/** + * Power on (or off) a single TCPC. + * minimum on/off delays are included. + * + * @param port Port number of TCPC. + * @param mode 0: power off, 1: power on. + */ +void board_set_tcpc_power_mode(int port, int mode) +{ + if (port != USB_PD_PORT_ANX74XX) + return; + + switch (mode) { + case ANX74XX_NORMAL_MODE: + gpio_set_level(GPIO_EN_USB_TCPC_PWR, 1); + msleep(ANX74XX_PWR_H_RST_H_DELAY_MS); + gpio_set_level(GPIO_USB_C0_PD_RST_L, 1); + break; + case ANX74XX_STANDBY_MODE: + gpio_set_level(GPIO_USB_C0_PD_RST_L, 0); + msleep(ANX74XX_RST_L_PWR_L_DELAY_MS); + gpio_set_level(GPIO_EN_USB_TCPC_PWR, 0); + msleep(ANX74XX_PWR_L_PWR_H_DELAY_MS); + break; + default: + break; + } +} + +/** + * Reset all system PD/TCPC MCUs -- currently only called from + * handle_pending_reboot() in common/power.c just before hard + * resetting the system. This logic is likely not needed as the + * PP3300_A rail should be dropped on EC reset. + */ +void board_reset_pd_mcu(void) +{ + /* Assert reset to TCPC1 */ + gpio_set_level(GPIO_USB_C1_PD_RST_ODL, 0); + + /* Assert reset to TCPC0 (anx3429) */ + gpio_set_level(GPIO_USB_C0_PD_RST_L, 0); + /* TCPC1 (ps8751) requires 1ms reset down assertion */ + msleep(MAX(1, ANX74XX_RST_L_PWR_L_DELAY_MS)); + + /* Deassert reset to TCPC1 */ + gpio_set_level(GPIO_USB_C1_PD_RST_ODL, 1); + /* Disable TCPC0 power */ + gpio_set_level(GPIO_EN_USB_TCPC_PWR, 0); + + /* + * anx3429 requires 10ms reset/power down assertion + */ + msleep(ANX74XX_PWR_L_PWR_H_DELAY_MS); + board_set_tcpc_power_mode(USB_PD_PORT_ANX74XX, 1); +} + +void board_tcpc_init(void) +{ + int port, reg; + + /* Only reset TCPC if not sysjump */ + if (!system_jumped_to_this_image()) + board_reset_pd_mcu(); + + /* + * TODO: Remove when Reef is updated with PS8751 A3. + * + * Force PS8751 A2 to wake from low power mode. + * If PS8751 remains in low power mode after sysjump, + * TCPM_INIT will fail due to not able to access PS8751. + * + * NOTE: PS8751 A3 will wake on any I2C access. + */ + reg = 0; + /* TODO MCHP: + * PS8751 is at I2C address 0x16. Original reef using + * address 0x10. Is this another attempt at waking PS8751 + * from DRP low power idle mode? + */ + i2c_read8(MCHP_I2C_PORT2, 0x10, 0xA0, ®); + + /* Enable TCPC0 interrupt */ + gpio_enable_interrupt(GPIO_USB_C0_PD_INT_ODL); + + /* Enable TCPC1 interrupt */ + gpio_enable_interrupt(GPIO_USB_C1_PD_INT_ODL); + +#ifdef CONFIG_USB_PD_TCPC_LOW_POWER + /* Enable CABLE_DET interrupt for ANX3429 wake from standby */ + gpio_enable_interrupt(GPIO_USB_C0_CABLE_DET); +#endif + /* + * Initialize HPD to low; after sysjump SOC needs to see + * HPD pulse to enable video path + */ + for (port = 0; port < CONFIG_USB_PD_PORT_COUNT; port++) { + const struct usb_mux *mux = &usb_muxes[port]; + + mux->hpd_update(port, 0, 0); + } +} +DECLARE_HOOK(HOOK_INIT, board_tcpc_init, HOOK_PRIO_INIT_I2C+1); + +/* + * Data derived from Seinhart-Hart equation in a resistor divider circuit with + * Vdd=3300mV, R = 13.7Kohm, and Murata NCP15WB-series thermistor (B = 4050, + * T0 = 298.15, nominal resistance (R0) = 47Kohm). + */ +#define CHARGER_THERMISTOR_SCALING_FACTOR 13 +static const struct thermistor_data_pair charger_thermistor_data[] = { + { 3044 / CHARGER_THERMISTOR_SCALING_FACTOR, 0 }, + { 2890 / CHARGER_THERMISTOR_SCALING_FACTOR, 10 }, + { 2680 / CHARGER_THERMISTOR_SCALING_FACTOR, 20 }, + { 2418 / CHARGER_THERMISTOR_SCALING_FACTOR, 30 }, + { 2117 / CHARGER_THERMISTOR_SCALING_FACTOR, 40 }, + { 1800 / CHARGER_THERMISTOR_SCALING_FACTOR, 50 }, + { 1490 / CHARGER_THERMISTOR_SCALING_FACTOR, 60 }, + { 1208 / CHARGER_THERMISTOR_SCALING_FACTOR, 70 }, + { 966 / CHARGER_THERMISTOR_SCALING_FACTOR, 80 }, + { 860 / CHARGER_THERMISTOR_SCALING_FACTOR, 85 }, + { 766 / CHARGER_THERMISTOR_SCALING_FACTOR, 90 }, + { 679 / CHARGER_THERMISTOR_SCALING_FACTOR, 95 }, + { 603 / CHARGER_THERMISTOR_SCALING_FACTOR, 100 }, +}; + +static const struct thermistor_info charger_thermistor_info = { + .scaling_factor = CHARGER_THERMISTOR_SCALING_FACTOR, + .num_pairs = ARRAY_SIZE(charger_thermistor_data), + .data = charger_thermistor_data, +}; + +int board_get_charger_temp(int idx, int *temp_ptr) +{ + int mv = adc_read_channel(MCHP_ADC_CH(0)); + + if (mv < 0) + return -1; + + *temp_ptr = thermistor_linear_interpolate(mv, + &charger_thermistor_info); + *temp_ptr = C_TO_K(*temp_ptr); + return 0; +} + +/* + * Data derived from Seinhart-Hart equation in a resistor divider circuit with + * Vdd=3300mV, R = 51.1Kohm, and Murata NCP15WB-series thermistor (B = 4050, + * T0 = 298.15, nominal resistance (R0) = 47Kohm). + */ +#define AMB_THERMISTOR_SCALING_FACTOR 11 +static const struct thermistor_data_pair amb_thermistor_data[] = { + { 2512 / AMB_THERMISTOR_SCALING_FACTOR, 0 }, + { 2158 / AMB_THERMISTOR_SCALING_FACTOR, 10 }, + { 1772 / AMB_THERMISTOR_SCALING_FACTOR, 20 }, + { 1398 / AMB_THERMISTOR_SCALING_FACTOR, 30 }, + { 1070 / AMB_THERMISTOR_SCALING_FACTOR, 40 }, + { 803 / AMB_THERMISTOR_SCALING_FACTOR, 50 }, + { 597 / AMB_THERMISTOR_SCALING_FACTOR, 60 }, + { 443 / AMB_THERMISTOR_SCALING_FACTOR, 70 }, + { 329 / AMB_THERMISTOR_SCALING_FACTOR, 80 }, + { 285 / AMB_THERMISTOR_SCALING_FACTOR, 85 }, + { 247 / AMB_THERMISTOR_SCALING_FACTOR, 90 }, + { 214 / AMB_THERMISTOR_SCALING_FACTOR, 95 }, + { 187 / AMB_THERMISTOR_SCALING_FACTOR, 100 }, +}; + +static const struct thermistor_info amb_thermistor_info = { + .scaling_factor = AMB_THERMISTOR_SCALING_FACTOR, + .num_pairs = ARRAY_SIZE(amb_thermistor_data), + .data = amb_thermistor_data, +}; + +int board_get_ambient_temp(int idx, int *temp_ptr) +{ + int mv = adc_read_channel(MCHP_ADC_CH(1)); + + if (mv < 0) + return -1; + + *temp_ptr = thermistor_linear_interpolate(mv, + &amb_thermistor_info); + *temp_ptr = C_TO_K(*temp_ptr); + return 0; +} + +/* + * name, sensor type, read function, + * index of sensor passed to read function, + * delay from read to taking action + */ +const struct temp_sensor_t temp_sensors[] = { + /* FIXME(dhendrix): tweak action_delay_sec */ + {"Battery", TEMP_SENSOR_TYPE_BATTERY, charge_get_battery_temp, 0, 1}, + {"Ambient", TEMP_SENSOR_TYPE_BOARD, board_get_ambient_temp, 0, 5}, + {"Charger", TEMP_SENSOR_TYPE_BOARD, board_get_charger_temp, 1, 1}, +}; +BUILD_ASSERT(ARRAY_SIZE(temp_sensors) == TEMP_SENSOR_COUNT); + +/* Called by APL power state machine when transitioning from G3 to S5 */ +void chipset_pre_init_callback(void) +{ + /* + * No need to re-init PMIC since settings are sticky across sysjump. + * However, be sure to check that PMIC is already enabled. If it is + * then there's no need to re-sequence the PMIC. + */ + if (system_jumped_to_this_image() && gpio_get_level(GPIO_PMIC_EN)) + return; + + /* Enable PP5000 before PP3300 due to NFC: chrome-os-partner:50807 */ + gpio_set_level(GPIO_EN_PP5000, 1); + while (!gpio_get_level(GPIO_PP5000_PG)) + ; + + /* + * To prevent SLP glitches, PMIC_EN (V5A_EN) should be enabled + * at the same time as PP3300 (chrome-os-partner:51323). + */ + /* Enable 3.3V rail */ + gpio_set_level(GPIO_EN_PP3300, 1); + while (!gpio_get_level(GPIO_PP3300_PG)) + ; + + /* Enable PMIC */ + gpio_set_level(GPIO_PMIC_EN, 1); +} + +static void board_set_tablet_mode(void) +{ + tablet_set_mode(!gpio_get_level(GPIO_TABLET_MODE_L)); +} + +/* Initialize board. */ +static void board_init(void) +{ + /* Ensure tablet mode is initialized according to the hardware state + * so that the cached state reflects reality. + */ + board_set_tablet_mode(); + + gpio_enable_interrupt(GPIO_TABLET_MODE_L); + + /* Enable charger interrupts */ + gpio_enable_interrupt(GPIO_CHARGER_INT_L); + + /* Enable Gyro interrupts */ + gpio_enable_interrupt(GPIO_BASE_SIXAXIS_INT_L); +} +/* PP3300 needs to be enabled before TCPC init hooks */ +DECLARE_HOOK(HOOK_INIT, board_init, HOOK_PRIO_FIRST); + +/* + * MCHP - new version of this routine. + * firmware-reef-9042.B must do port lookup here + * before calling bd9995x_is_vbus_provided + */ +int pd_snk_is_vbus_provided(int port) +{ + if (port != 0 && port != 1) + panic("Invalid charge port\n"); + + return bd9995x_is_vbus_provided(port); +} + +/** + * Set active charge port -- only one port can be active at a time. + * + * @param charge_port Charge port to enable. + * + * Returns EC_SUCCESS if charge port is accepted and made active, + * EC_ERROR_* otherwise. + */ +int board_set_active_charge_port(int charge_port) +{ + enum bd9995x_charge_port bd9995x_port; + int bd9995x_port_select = 1; + + switch (charge_port) { + case USB_PD_PORT_ANX74XX: + case USB_PD_PORT_PS8751: + /* Don't charge from a source port */ + if (board_vbus_source_enabled(charge_port)) + return -1; + + bd9995x_port = charge_port; + break; + case CHARGE_PORT_NONE: + bd9995x_port_select = 0; + bd9995x_port = BD9995X_CHARGE_PORT_BOTH; + + /* + * To avoid inrush current from the external charger, enable + * discharge on AC till the new charger is detected and + * charge detect delay has passed. + */ + if (charge_get_percent() > 2) + charger_discharge_on_ac(1); + break; + default: + panic("Invalid charge port\n"); + break; + } + + CPRINTS("New chg p%d", charge_port); + return bd9995x_select_input_port(bd9995x_port, bd9995x_port_select); +} + +/** + * Set the charge limit based upon desired maximum. + * + * @param port Port number. + * @param supplier Charge supplier type. + * @param charge_ma Desired charge limit (mA). + * @param charge_mv Negotiated charge voltage (mV). + */ +void board_set_charge_limit(int port, int supplier, int charge_ma, + int max_ma, int charge_mv) +{ + /* Enable charging trigger by BC1.2 detection */ + int bc12_enable = (supplier == CHARGE_SUPPLIER_BC12_CDP || + supplier == CHARGE_SUPPLIER_BC12_DCP || + supplier == CHARGE_SUPPLIER_BC12_SDP || + supplier == CHARGE_SUPPLIER_OTHER); + + if (bd9995x_bc12_enable_charging(port, bc12_enable)) + return; + + charge_ma = (charge_ma * 95) / 100; + charge_set_input_current_limit(MAX(charge_ma, + CONFIG_CHARGER_INPUT_CURRENT), charge_mv); +} + +/* + * MCHP next two functions from production firmware-reef-9042.B + * Have changes to USB PD common and TCPCI driver code deprecated + * these functions? + */ +/** + * Return whether ramping is allowed for given supplier + */ +int board_is_ramp_allowed(int supplier) +{ + /* Don't allow ramping in RO when write protected */ + if (system_get_image_copy() != SYSTEM_IMAGE_RW + && system_is_locked()) + return 0; + else + return (supplier == CHARGE_SUPPLIER_BC12_DCP || + supplier == CHARGE_SUPPLIER_BC12_SDP || + supplier == CHARGE_SUPPLIER_BC12_CDP || + supplier == CHARGE_SUPPLIER_OTHER); +} + +/** + * Return if board is consuming full amount of input current + */ +int board_is_consuming_full_charge(void) +{ + int chg_perc = charge_get_percent(); + + return chg_perc > 2 && chg_perc < 95; +} + +/** + * Return if VBUS is sagging too low + */ +int board_is_vbus_too_low(int port, enum chg_ramp_vbus_state ramp_state) +{ + return charger_get_vbus_voltage(port) < BD9995X_BC12_MIN_VOLTAGE; +} + +static void enable_input_devices(void) +{ + /* We need to turn on tablet mode for motion sense */ + board_set_tablet_mode(); + + /* Then, we disable peripherals only when the lid reaches 360 position. + * (It's probably already disabled by motion_sense_task.) + * We deliberately do not enable peripherals when the lid is leaving + * 360 position. Instead, we let motion_sense_task enable it once it + * reaches laptop zone (180 or less). + */ + if (tablet_get_mode()) + lid_angle_peripheral_enable(0); +} + +/* Enable or disable input devices, based on chipset state and tablet mode */ +#ifndef TEST_BUILD +void lid_angle_peripheral_enable(int enable) +{ + /* If the lid is in 360 position, ignore the lid angle, + * which might be faulty. Disable keyboard. + */ + if (tablet_get_mode() || chipset_in_state(CHIPSET_STATE_ANY_OFF)) + enable = 0; + keyboard_scan_enable(enable, KB_SCAN_DISABLE_LID_ANGLE); +} +#endif + +/* Called on AP S5 -> S3 transition */ +static void board_chipset_startup(void) +{ + /* Enable USB-A port. */ + gpio_set_level(GPIO_USB1_ENABLE, 1); + + /* Enable Trackpad */ + gpio_set_level(GPIO_EN_P3300_TRACKPAD_ODL, 0); + + hook_call_deferred(&enable_input_devices_data, 0); +} +DECLARE_HOOK(HOOK_CHIPSET_STARTUP, board_chipset_startup, HOOK_PRIO_DEFAULT); + +/* Called on AP S3 -> S5 transition */ +static void board_chipset_shutdown(void) +{ + /* Disable USB-A port. */ + gpio_set_level(GPIO_USB1_ENABLE, 0); + + /* Disable Trackpad */ + gpio_set_level(GPIO_EN_P3300_TRACKPAD_ODL, 1); + + hook_call_deferred(&enable_input_devices_data, 0); + /* FIXME(dhendrix): Drive USB_PD_RST_ODL low to prevent + * leakage? (see comment in schematic) + */ +} +DECLARE_HOOK(HOOK_CHIPSET_SHUTDOWN, board_chipset_shutdown, HOOK_PRIO_DEFAULT); + +/* FIXME(dhendrix): Add CHIPSET_RESUME and CHIPSET_SUSPEND + * hooks to enable/disable sensors? + */ +/* + * MCHP: Next two routines not present in firmware-reef-9042.B + */ +/* Called on AP S3 -> S0 transition */ +static void board_chipset_resume(void) +{ + gpio_set_level(GPIO_ENABLE_BACKLIGHT, 1); +} +DECLARE_HOOK(HOOK_CHIPSET_RESUME, board_chipset_resume, HOOK_PRIO_DEFAULT); + +/* Called on AP S0 -> S3 transition */ +static void board_chipset_suspend(void) +{ + gpio_set_level(GPIO_ENABLE_BACKLIGHT, 0); +} +DECLARE_HOOK(HOOK_CHIPSET_SUSPEND, board_chipset_suspend, HOOK_PRIO_DEFAULT); + +/* + * FIXME(dhendrix): Weak symbol hack until we can get a better solution for + * both Amenia and Reef. + */ +void chipset_do_shutdown(void) +{ + /* Disable PMIC */ + gpio_set_level(GPIO_PMIC_EN, 0); + + /*Disable 3.3V rail */ + gpio_set_level(GPIO_EN_PP3300, 0); + while (gpio_get_level(GPIO_PP3300_PG)) + ; + + /*Disable 5V rail */ + gpio_set_level(GPIO_EN_PP5000, 0); + while (gpio_get_level(GPIO_PP5000_PG)) + ; +} + +void board_hibernate_late(void) +{ + int i; + const uint32_t hibernate_pins[][2] = { + /* Turn off LEDs in hibernate */ + {GPIO_BAT_LED_BLUE, GPIO_INPUT | GPIO_PULL_UP}, + {GPIO_BAT_LED_AMBER, GPIO_INPUT | GPIO_PULL_UP}, + {GPIO_LID_OPEN, GPIO_INT_RISING | GPIO_PULL_DOWN}, + + /* + * BD99956 handles charge input automatically. We'll disable + * charge output in hibernate. Charger will assert ACOK_OD + * when VBUS or VCC are plugged in. + */ + {GPIO_USB_C0_5V_EN, GPIO_INPUT | GPIO_PULL_DOWN}, + {GPIO_USB_C1_5V_EN, GPIO_INPUT | GPIO_PULL_DOWN}, + }; + + /* Change GPIOs' state in hibernate for better power consumption */ + for (i = 0; i < ARRAY_SIZE(hibernate_pins); ++i) + gpio_set_flags(hibernate_pins[i][0], hibernate_pins[i][1]); + + gpio_config_module(MODULE_KEYBOARD_SCAN, 0); + + /* + * Calling gpio_config_module sets disabled alternate function pins to + * GPIO_INPUT. But to prevent keypresses causing leakage currents + * while hibernating we want to enable GPIO_PULL_UP as well. + */ + gpio_set_flags_by_mask(0x2, 0x03, GPIO_INPUT | GPIO_PULL_UP); + gpio_set_flags_by_mask(0x1, 0x7F, GPIO_INPUT | GPIO_PULL_UP); + gpio_set_flags_by_mask(0x0, 0xE0, GPIO_INPUT | GPIO_PULL_UP); + /* KBD_KSO2 needs to have a pull-down enabled instead of pull-up */ + gpio_set_flags_by_mask(0x1, 0x80, GPIO_INPUT | GPIO_PULL_DOWN); +} + +/* Motion sensors */ +/* Mutexes */ +static struct mutex g_lid_mutex; +static struct mutex g_base_mutex; + +/* Matrix to rotate accelrator into standard reference frame */ +const matrix_3x3_t base_standard_ref = { + { 0, FLOAT_TO_FP(-1), 0}, + { FLOAT_TO_FP(1), 0, 0}, + { 0, 0, FLOAT_TO_FP(1)} +}; + +const matrix_3x3_t mag_standard_ref = { + { FLOAT_TO_FP(-1), 0, 0}, + { 0, FLOAT_TO_FP(1), 0}, + { 0, 0, FLOAT_TO_FP(-1)} +}; + +/* sensor private data */ +static struct kionix_accel_data g_kx022_data; +static struct bmi160_drv_data_t g_bmi160_data; +static struct bmp280_drv_data_t bmp280_drv_data; +/* MCHP: struct not present in firmware-reef-9042.B */ +static struct opt3001_drv_data_t g_opt3001_data = { + .scale = 1, + .uscale = 0, + .offset = 0, +}; + +/* MCHP: differences in structure initializatio from + * firmware-reef-9042.B + */ +/* FIXME(dhendrix): Copied from Amenia, probably need to tweak for Reef */ +struct motion_sensor_t motion_sensors[] = { + [LID_ACCEL] = { + .name = "Lid Accel", + .active_mask = SENSOR_ACTIVE_S0_S3, + .chip = MOTIONSENSE_CHIP_KX022, + .type = MOTIONSENSE_TYPE_ACCEL, + .location = MOTIONSENSE_LOC_LID, + .drv = &kionix_accel_drv, + .mutex = &g_lid_mutex, + .drv_data = &g_kx022_data, + .port = I2C_PORT_LID_ACCEL, + .addr = KX022_ADDR1, + .rot_standard_ref = NULL, /* Identity matrix. */ + .default_range = 2, /* g, enough for laptop. */ + .min_frequency = KX022_ACCEL_MIN_FREQ, + .max_frequency = KX022_ACCEL_MAX_FREQ, + .config = { + /* EC use accel for angle detection */ + [SENSOR_CONFIG_EC_S0] = { + .odr = 10000 | ROUND_UP_FLAG, + }, + /* Sensor on for lid angle detection */ + [SENSOR_CONFIG_EC_S3] = { + .odr = 10000 | ROUND_UP_FLAG, + }, + }, + }, + + [BASE_ACCEL] = { + .name = "Base Accel", + .active_mask = SENSOR_ACTIVE_S0_S3, + .chip = MOTIONSENSE_CHIP_BMI160, + .type = MOTIONSENSE_TYPE_ACCEL, + .location = MOTIONSENSE_LOC_BASE, + .drv = &bmi160_drv, + .mutex = &g_base_mutex, + .drv_data = &g_bmi160_data, + .port = I2C_PORT_GYRO, + .addr = BMI160_ADDR0, + .rot_standard_ref = &base_standard_ref, + .default_range = 2, /* g, enough for laptop. */ + .min_frequency = BMI160_ACCEL_MIN_FREQ, + .max_frequency = BMI160_ACCEL_MAX_FREQ, + .config = { + /* EC use accel for angle detection */ + [SENSOR_CONFIG_EC_S0] = { + .odr = 10000 | ROUND_UP_FLAG, + .ec_rate = 100 * MSEC, + }, + /* Sensor on for lid angle detection */ + [SENSOR_CONFIG_EC_S3] = { + .odr = 10000 | ROUND_UP_FLAG, + .ec_rate = 100 * MSEC, + }, + }, + }, + + [BASE_GYRO] = { + .name = "Base Gyro", + .active_mask = SENSOR_ACTIVE_S0, + .chip = MOTIONSENSE_CHIP_BMI160, + .type = MOTIONSENSE_TYPE_GYRO, + .location = MOTIONSENSE_LOC_BASE, + .drv = &bmi160_drv, + .mutex = &g_base_mutex, + .drv_data = &g_bmi160_data, + .port = I2C_PORT_GYRO, + .addr = BMI160_ADDR0, + .default_range = 1000, /* dps */ + .rot_standard_ref = &base_standard_ref, + .min_frequency = BMI160_GYRO_MIN_FREQ, + .max_frequency = BMI160_GYRO_MAX_FREQ, + }, + [BASE_MAG] = { + .name = "Base Mag", + .active_mask = SENSOR_ACTIVE_S0, + .chip = MOTIONSENSE_CHIP_BMI160, + .type = MOTIONSENSE_TYPE_MAG, + .location = MOTIONSENSE_LOC_BASE, + .drv = &bmi160_drv, + .mutex = &g_base_mutex, + .drv_data = &g_bmi160_data, + .port = I2C_PORT_GYRO, + .addr = BMI160_ADDR0, + .default_range = 1 << 11, /* 16LSB / uT, fixed */ + .rot_standard_ref = &mag_standard_ref, + .min_frequency = BMM150_MAG_MIN_FREQ, + .max_frequency = BMM150_MAG_MAX_FREQ(SPECIAL), + }, + [BASE_BARO] = { + .name = "Base Baro", + .active_mask = SENSOR_ACTIVE_S0, + .chip = MOTIONSENSE_CHIP_BMP280, + .type = MOTIONSENSE_TYPE_BARO, + .location = MOTIONSENSE_LOC_BASE, + .drv = &bmp280_drv, + .drv_data = &bmp280_drv_data, + .port = I2C_PORT_BARO, + .addr = BMP280_I2C_ADDRESS1, + .default_range = 1 << 18, /* 1bit = 4 Pa, 16bit ~= 2600 hPa */ + .min_frequency = BMP280_BARO_MIN_FREQ, + .max_frequency = BMP280_BARO_MAX_FREQ, + }, + [LID_ALS] = { + .name = "Light", + .active_mask = SENSOR_ACTIVE_S0_S3, + .chip = MOTIONSENSE_CHIP_OPT3001, + .type = MOTIONSENSE_TYPE_LIGHT, + .location = MOTIONSENSE_LOC_LID, + .drv = &opt3001_drv, + .drv_data = &g_opt3001_data, + .port = I2C_PORT_ALS, + .addr = OPT3001_I2C_ADDR1, + .rot_standard_ref = NULL, + .default_range = 0x10000, /* scale = 1; uscale = 0 */ + .min_frequency = OPT3001_LIGHT_MIN_FREQ, + .max_frequency = OPT3001_LIGHT_MAX_FREQ, + .config = { + [SENSOR_CONFIG_EC_S0] = { + .odr = 1000, + }, + }, + }, +}; +const unsigned int motion_sensor_count = ARRAY_SIZE(motion_sensors); + +/* + * MCHP: difference from firmware-reef-9042.B + * New code doesn't have TASK_ALS + */ +/* ALS instances when LPC mapping is needed. Each entry directs to a sensor. */ +const struct motion_sensor_t *motion_als_sensors[] = { + &motion_sensors[LID_ALS], +}; +BUILD_ASSERT(ARRAY_SIZE(motion_als_sensors) == ALS_COUNT); + +void board_hibernate(void) +{ + /* + * To support hibernate called from console commands, ectool commands + * and key sequence, shutdown the AP before hibernating. + */ + chipset_do_shutdown(); + + /* Added delay to allow AP to settle down */ + msleep(100); + + /* Enable both the VBUS & VCC ports before entering PG3 */ + bd9995x_select_input_port(BD9995X_CHARGE_PORT_BOTH, 1); + + /* Turn BGATE OFF for saving the power */ + bd9995x_set_power_save_mode(BD9995X_PWR_SAVE_MAX); +} + +struct { + enum reef_board_version version; + int thresh_mv; +} const reef_board_versions[] = { + /* Vin = 3.3V, R1 = 46.4K, R2 values listed below */ + { BOARD_VERSION_1, 328 * 1.03 }, /* 5.11 Kohm */ + { BOARD_VERSION_2, 670 * 1.03 }, /* 11.8 Kohm */ + { BOARD_VERSION_3, 1012 * 1.03 }, /* 20.5 Kohm */ + { BOARD_VERSION_4, 1357 * 1.03 }, /* 32.4 Kohm */ + { BOARD_VERSION_5, 1690 * 1.03 }, /* 48.7 Kohm */ + { BOARD_VERSION_6, 2020 * 1.03 }, /* 73.2 Kohm */ + { BOARD_VERSION_7, 2352 * 1.03 }, /* 115 Kohm */ + { BOARD_VERSION_8, 2802 * 1.03 }, /* 261 Kohm */ +}; +BUILD_ASSERT(ARRAY_SIZE(reef_board_versions) == BOARD_VERSION_COUNT); + +/* + * Checkpatch claims msleep(n) for n < 20 can sleep up to 20 ms. + * Loop up to 10 times sampling every 100 us. If 5 or more consecutive + * samples are the same exit sample loop. + */ +int board_get_version(void) +{ + static int version = BOARD_VERSION_UNKNOWN; + int mv, i, prev, cnt; + + if (version != BOARD_VERSION_UNKNOWN) + return version; + + /* FIXME(dhendrix): enable ADC */ + gpio_set_flags(GPIO_EC_BRD_ID_EN_ODL, GPIO_ODR_HIGH); + gpio_set_level(GPIO_EC_BRD_ID_EN_ODL, 0); + /* Wait to allow cap charge */ + prev = 0; + cnt = 0; + for (i = 0; i < 10; i++) { + udelay(100); + mv = adc_read_channel(ADC_BOARD_ID); + if (mv != prev) { + prev = mv; + cnt = 0; + } else { + cnt++; + } + if (cnt >= 5) + break; + } + /* FIXME(dhendrix): disable ADC */ + gpio_set_level(GPIO_EC_BRD_ID_EN_ODL, 1); + gpio_set_flags(GPIO_EC_BRD_ID_EN_ODL, GPIO_INPUT); + + if (mv == ADC_READ_ERROR) { + version = BOARD_VERSION_UNKNOWN; + return version; + } + + for (i = 0; i < BOARD_VERSION_COUNT; i++) { + if (mv < reef_board_versions[i].thresh_mv) { + version = reef_board_versions[i].version; + break; + } + } + + CPRINTS("Board version: %d", version); + return version; +} + +/* Keyboard scan setting */ +struct keyboard_scan_config keyscan_config = { + /* + * F3 key scan cycle completed but scan input is not + * charging to logic high when EC start scan next + * column for "T" key, so we set .output_settle_us + * to 80us from 50us. + */ + .output_settle_us = 80, + .debounce_down_us = 9 * MSEC, + .debounce_up_us = 30 * MSEC, + .scan_period_us = 3 * MSEC, + .min_post_scan_delay_us = 1000, + .poll_timeout_us = 100 * MSEC, + .actual_key_mask = { + 0x14, 0xff, 0xff, 0xff, 0xff, 0xf5, 0xff, + 0xa4, 0xff, 0xfe, 0x55, 0xfa, 0xca /* full set */ + }, +}; diff --git a/board/reef_mchp/board.h b/board/reef_mchp/board.h new file mode 100644 index 0000000000..1afd0aed3a --- /dev/null +++ b/board/reef_mchp/board.h @@ -0,0 +1,350 @@ +/* Copyright 2016 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/* Reef board configuration */ + +#ifndef __CROS_EC_BOARD_H +#define __CROS_EC_BOARD_H + +/* + * By default, enable all console messages excepted HC, ACPI and event: + * The sensor stack is generating a lot of activity. + */ +#define CC_DEFAULT (CC_ALL & ~(CC_MASK(CC_EVENTS) | CC_MASK(CC_LPC))) +#undef CONFIG_HOSTCMD_DEBUG_MODE +#define CONFIG_HOSTCMD_DEBUG_MODE HCDEBUG_OFF + + +/* EC console commands */ +#define CONFIG_CMD_ACCELS +#define CONFIG_CMD_ACCEL_INFO +#define CONFIG_CMD_BATT_MFG_ACCESS +#define CONFIG_CMD_CHARGER_ADC_AMON_BMON +#define CONFIG_CHARGER_SENSE_RESISTOR 10 +#define CONFIG_CHARGER_SENSE_RESISTOR_AC 10 +#define BD9995X_IOUT_GAIN_SELECT \ + BD9995X_CMD_PMON_IOUT_CTRL_SET_IOUT_GAIN_SET_20V + +#define CONFIG_CHARGER_PSYS_READ +#define BD9995X_PSYS_GAIN_SELECT \ + BD9995X_CMD_PMON_IOUT_CTRL_SET_PMON_GAIN_SET_02UAW + +#define CONFIG_CMD_I2C_STRESS_TEST +#define CONFIG_CMD_I2C_STRESS_TEST_ACCEL +#define CONFIG_CMD_I2C_STRESS_TEST_ALS +#define CONFIG_CMD_I2C_STRESS_TEST_BATTERY +#define CONFIG_CMD_I2C_STRESS_TEST_CHARGER +#define CONFIG_CMD_I2C_STRESS_TEST_TCPC + +/* Battery */ +#define CONFIG_BATTERY_DEVICE_CHEMISTRY "LION" +#define CONFIG_BATTERY_CUT_OFF +#define CONFIG_BATTERY_PRESENT_CUSTOM +#define CONFIG_BATTERY_SMART + +/* Charger */ +#define CONFIG_CHARGE_MANAGER +#define CONFIG_CHARGE_RAMP_SW +#define CONFIG_CHARGER +#define CONFIG_CHARGER_V2 +#define CONFIG_CHARGER_BD9995X +#define CONFIG_CHARGER_BD9995X_CHGEN +#define CONFIG_CHARGER_DISCHARGE_ON_AC +#define CONFIG_CHARGER_INPUT_CURRENT 512 +#define CONFIG_CHARGER_LIMIT_POWER_THRESH_BAT_PCT 1 +#define CONFIG_CHARGER_LIMIT_POWER_THRESH_CHG_MW 18000 +#define CONFIG_CHARGER_MAINTAIN_VBAT +#define CONFIG_CHARGER_MIN_BAT_PCT_FOR_POWER_ON 1 +#define CONFIG_USB_CHARGER +#define CONFIG_CHARGER_PROFILE_OVERRIDE +#define CONFIG_CHARGER_PROFILE_OVERRIDE_COMMON +#undef CONFIG_CHARGER_PROFILE_VOLTAGE_RANGES +#define CONFIG_CHARGER_PROFILE_VOLTAGE_RANGES 3 +#define CONFIG_CHARGE_MANAGER_EXTERNAL_POWER_LIMIT + +/* USB-A config */ +#define CONFIG_USB_PORT_POWER_SMART +#define CONFIG_USB_PORT_POWER_SMART_DEFAULT_MODE USB_CHARGE_MODE_CDP +#define CONFIG_USB_PORT_POWER_SMART_SIMPLE +#undef CONFIG_USB_PORT_POWER_SMART_PORT_COUNT +#define CONFIG_USB_PORT_POWER_SMART_PORT_COUNT 1 +#define GPIO_USB1_ILIM_SEL GPIO_USB_A_CHARGE_EN_L +#define GPIO_USB_CTL1 GPIO_EN_PP5000 + +#define CONFIG_TABLET_MODE + +/* USB PD config */ +#define CONFIG_CMD_PD_CONTROL +#define CONFIG_USB_PD_ALT_MODE +#define CONFIG_USB_PD_ALT_MODE_DFP +#define CONFIG_USB_PD_DUAL_ROLE +#define CONFIG_USB_PD_DUAL_ROLE_AUTO_TOGGLE +#define CONFIG_USB_PD_DISCHARGE_TCPC +#define CONFIG_USB_PD_LOGGING +#define CONFIG_USB_PD_MAX_SINGLE_SOURCE_CURRENT TYPEC_RP_3A0 +#define CONFIG_USB_PD_PORT_COUNT 2 +#define CONFIG_USB_PD_VBUS_DETECT_CHARGER +#define CONFIG_USB_PD_TCPC_LOW_POWER +#define CONFIG_USB_PD_TCPM_MUX /* for both PS8751 and ANX3429 */ +#define CONFIG_USB_PD_TCPM_ANX3429 /* Silicon on Reef is ANX3429 */ +#define CONFIG_USB_PD_TCPM_PS8751 +#define CONFIG_USB_PD_TCPM_TCPCI +#define CONFIG_USB_PD_TRY_SRC +#define CONFIG_USB_POWER_DELIVERY +#define CONFIG_USB_PD_COMM_LOCKED + +#define CONFIG_USBC_SS_MUX +#define CONFIG_USBC_SS_MUX_DFP_ONLY +#define CONFIG_USBC_VCONN +#define CONFIG_USBC_VCONN_SWAP + +/* SoC / PCH */ +#define CONFIG_HOSTCMD_LPC +#define CONFIG_CHIPSET_APOLLOLAKE +#define CONFIG_CHIPSET_RESET_HOOK +#define CONFIG_POWER_BUTTON +#define CONFIG_POWER_BUTTON_X86 +#define CONFIG_POWER_COMMON +#define CONFIG_POWER_S0IX +#define CONFIG_POWER_TRACK_HOST_SLEEP_STATE + +/* EC */ +#define CONFIG_ADC +#define CONFIG_BOARD_VERSION_CUSTOM +#define CONFIG_EXTPOWER_GPIO +#undef CONFIG_EXTPOWER_DEBOUNCE_MS +#define CONFIG_EXTPOWER_DEBOUNCE_MS 1000 +#define CONFIG_FPU +#define CONFIG_HOSTCMD_FLASH_SPI_INFO +#define CONFIG_I2C +#define CONFIG_I2C_MASTER +#define CONFIG_KEYBOARD_BOARD_CONFIG +#define CONFIG_KEYBOARD_PROTOCOL_8042 +#define CONFIG_KEYBOARD_COL2_INVERTED +#define CONFIG_KEYBOARD_PWRBTN_ASSERTS_KSI2 +#define CONFIG_LED_COMMON +#define CONFIG_LID_SWITCH +#define CONFIG_LOW_POWER_IDLE +#define CONFIG_LTO +#define CONFIG_POWER_SIGNAL_INTERRUPT_STORM_DETECT_THRESHOLD 30 +#define CONFIG_PWM +#define CONFIG_TEMP_SENSOR +#define CONFIG_THERMISTOR_NCP15WB +#define CONFIG_DPTF +#define CONFIG_DPTF_DEVICE_ORIENTATION +#define CONFIG_SCI_GPIO GPIO_PCH_SCI_L +#define CONFIG_VOLUME_BUTTONS +#define GPIO_VOLUME_DOWN_L GPIO_EC_VOLDN_BTN_ODL +#define GPIO_VOLUME_UP_L GPIO_EC_VOLUP_BTN_ODL +#define CONFIG_VBOOT_HASH +#define CONFIG_BACKLIGHT_LID +#define CONFIG_WIRELESS +#define CONFIG_WIRELESS_SUSPEND EC_WIRELESS_SWITCH_WLAN_POWER +#define CONFIG_WLAN_POWER_ACTIVE_LOW +#define WIRELESS_GPIO_WLAN_POWER GPIO_WIRELESS_GPIO_WLAN_POWER +#define CONFIG_PWR_STATE_DISCHARGE_FULL + +/* + * During shutdown sequence TPS65094x PMIC turns off the sensor rails + * asynchronously to the EC. If we access the sensors when the sensor power + * rails are off we get I2C errors. To avoid this issue, defer switching + * the sensors rate if in S3. By the time deferred function is serviced if + * the chipset is in S5 we can back out from switching the sensor rate. + * + * Time taken by V1P8U rail to go down from S3 is 30ms to 60ms hence defer + * the sensor switching after 60ms. + */ +#undef CONFIG_MOTION_SENSE_SUSPEND_DELAY_US +#define CONFIG_MOTION_SENSE_SUSPEND_DELAY_US (MSEC * 60) + +/* + * MEC1701H loads firmware using QMSPI controller + * CONFIG_SPI_FLASH_PORT is the index into + * spi_devices[] in board.c + */ +#define CONFIG_SPI_FLASH_PORT 0 +#define CONFIG_SPI_FLASH + +#define CONFIG_FLASH_SIZE 524288 +#define CONFIG_SPI_FLASH_REGS +#define CONFIG_SPI_FLASH_W25Q40 /* FIXME: Should be GD25LQ40? */ + +/* + * Enable 1 slot of secure temporary storage to support + * suspend/resume with read/write memory training. + */ +#define CONFIG_VSTORE +#define CONFIG_VSTORE_SLOT_COUNT 1 + +/* Optional feature - used by MCHP */ +#define CONFIG_CLOCK_CRYSTAL /* interposer board uses parallel crystal */ +#define CONFIG_WATCHDOG_HELP /* required for MCHP MEC17xx */ +#define CONFIG_BOARD_PRE_INIT + +/* I2C ports */ +#define I2C_CONTROLLER_COUNT 4 +#define I2C_PORT_COUNT 5 + +#define I2C_PORT_GYRO MCHP_I2C_PORT6 +#define I2C_PORT_LID_ACCEL MCHP_I2C_PORT7 +#define I2C_PORT_ALS MCHP_I2C_PORT7 +#define I2C_PORT_BARO MCHP_I2C_PORT7 +#define I2C_PORT_BATTERY MCHP_I2C_PORT3 +#define I2C_PORT_CHARGER MCHP_I2C_PORT3 +/* Accelerometer and Gyroscope are the same device. */ +#define I2C_PORT_ACCEL I2C_PORT_GYRO + +/* Sensors */ +#define CONFIG_MKBP_EVENT +#define CONFIG_MKBP_USE_HOST_EVENT +#define CONFIG_ACCELGYRO_BMI160 +#define CONFIG_ACCEL_INTERRUPTS +#define CONFIG_ACCELGYRO_BMI160_INT_EVENT TASK_EVENT_CUSTOM(4) +#define CONFIG_MAG_BMI160_BMM150 +#define BMM150_I2C_ADDRESS BMM150_ADDR0 /* 8-bit address */ +#define CONFIG_MAG_CALIBRATE +#define CONFIG_ACCEL_KX022 +#define CONFIG_ALS_OPT3001 +#define CONFIG_BARO_BMP280 +#define CONFIG_LID_ANGLE +#define CONFIG_LID_ANGLE_UPDATE +#define CONFIG_LID_ANGLE_SENSOR_BASE BASE_ACCEL +#define CONFIG_LID_ANGLE_SENSOR_LID LID_ACCEL + +/* FIFO size is in power of 2. */ +#define CONFIG_ACCEL_FIFO 1024 + +/* Depends on how fast the AP boots and typical ODRs */ +#define CONFIG_ACCEL_FIFO_THRES (CONFIG_ACCEL_FIFO / 3) + + +#ifndef __ASSEMBLER__ + +#include "gpio_signal.h" +#include "registers.h" + +/* ADC signal */ +enum adc_channel { + ADC_TEMP_SENSOR_CHARGER, /* ADC0 */ + ADC_TEMP_SENSOR_AMB, /* ADC1 */ + ADC_BOARD_ID, /* ADC2 */ + ADC_CH_COUNT +}; + +enum pwm_channel { + PWM_CH_LED_GREEN = 0, + PWM_CH_LED_RED, + /* Number of PWM channels */ + PWM_CH_COUNT +}; + +enum power_signal { +#ifdef CONFIG_POWER_S0IX + X86_SLP_S0_N, +#endif + X86_RSMRST_N, + X86_SLP_S3_N, + X86_SLP_S4_N, + X86_SUSPWRDNACK, + + X86_ALL_SYS_PG, /* PMIC_EC_PWROK_OD */ + X86_PGOOD_PP3300, /* GPIO_PP3300_PG */ + X86_PGOOD_PP5000, /* GPIO_PP5000_PG */ + + /* Number of X86 signals */ + POWER_SIGNAL_COUNT +}; + +enum temp_sensor_id { + TEMP_SENSOR_BATTERY = 0, + TEMP_SENSOR_AMBIENT, + TEMP_SENSOR_CHARGER, + TEMP_SENSOR_COUNT +}; + +/* MCHP - new Reef code not using TASK_ALS */ +/* + * For backward compatibility, to report ALS via ACPI, + * Define the number of ALS sensors: motion_sensor copy the data to the ALS + * memmap region. + */ +#define CONFIG_ALS +#define ALS_COUNT 1 + +/* + * Motion sensors: + * When reading through IO memory is set up for sensors (LPC is used), + * the first 2 entries must be accelerometers, then gyroscope. + * For BMI160, accel, gyro and compass sensors must be next to each other. + */ +enum sensor_id { + LID_ACCEL = 0, + BASE_ACCEL, + BASE_GYRO, + BASE_MAG, + BASE_BARO, + LID_ALS, /* firmware-reef-9042.B doesn't have this */ +}; + +enum reef_board_version { + BOARD_VERSION_UNKNOWN = -1, + BOARD_VERSION_1, + BOARD_VERSION_2, + BOARD_VERSION_3, + BOARD_VERSION_4, + BOARD_VERSION_5, + BOARD_VERSION_6, + BOARD_VERSION_7, + BOARD_VERSION_8, + BOARD_VERSION_COUNT, +}; + +/* TODO: determine the following board specific type-C power constants */ +/* FIXME(dhendrix): verify all of the below PD_* numbers */ +/* + * delay to turn on the power supply max is ~16ms. + * delay to turn off the power supply max is about ~180ms. + */ +#define PD_POWER_SUPPLY_TURN_ON_DELAY 30000 /* us */ +#define PD_POWER_SUPPLY_TURN_OFF_DELAY 250000 /* us */ + +/* delay to turn on/off vconn */ +#define PD_VCONN_SWAP_DELAY 5000 /* us */ + +/* Define typical operating power and max power */ +#define PD_OPERATING_POWER_MW 15000 +#define PD_MAX_POWER_MW 45000 +#define PD_MAX_CURRENT_MA 3000 +#define PD_MAX_VOLTAGE_MV 20000 + +/* Reset PD MCU */ +void board_reset_pd_mcu(void); + +int board_get_version(void); + +void board_set_tcpc_power_mode(int port, int mode); +void board_print_tcpc_fw_version(int port); + +/* Map I2C port to controller */ +int board_i2c_p2c(int port); + +/* Return the two slave addresses the specified + * controller will respond to when controller + * is acting as a slave. + * b[6:0] = b[7:1] of I2C address 1 + * b[14:8] = b[7:1] of I2C address 2 + */ +uint16_t board_i2c_slave_addrs(int controller); + +/* MCHP - firwmare-reef-9042.B does have LID_ALS bit + * because its using TASK_ALS ? + */ +/* Sensors without hardware FIFO are in forced mode */ +#define CONFIG_ACCEL_FORCE_MODE_MASK \ + ((1 << LID_ACCEL) | (1 << BASE_BARO) | (1 << LID_ALS)) + +#endif /* !__ASSEMBLER__ */ + +#endif /* __CROS_EC_BOARD_H */ diff --git a/board/reef_mchp/build.mk b/board/reef_mchp/build.mk new file mode 100644 index 0000000000..303eae4be4 --- /dev/null +++ b/board/reef_mchp/build.mk @@ -0,0 +1,16 @@ +# -*- makefile -*- +# Copyright 2018 The Chromium OS Authors. All rights reserved. +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. +# +# Board specific files build +# + +CHIP:=mchp +CHIP_FAMILY:=mec17xx +CHIP_VARIANT:=mec1701h +CHIP_SPI_SIZE_KB:=512 + +board-y=board.o led.o +board-$(CONFIG_BATTERY_SMART)+=battery.o +board-$(CONFIG_USB_POWER_DELIVERY)+=usb_pd_policy.o diff --git a/board/reef_mchp/ec.tasklist b/board/reef_mchp/ec.tasklist new file mode 100644 index 0000000000..5c591ef1ef --- /dev/null +++ b/board/reef_mchp/ec.tasklist @@ -0,0 +1,46 @@ +/* Copyright 2016 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/* + * List of enabled tasks in the priority order + * + * The first one has the lowest priority. + * + * For each task, use the macro TASK_ALWAYS(n, r, d, s) for base tasks and + * TASK_NOTEST(n, r, d, s) for tasks that can be excluded in test binaries, + * where : + * 'n' in the name of the task + * 'r' in the main routine of the task + * 'd' in an opaque parameter passed to the routine at startup + * 's' is the stack size in bytes; must be a multiple of 8 + * + * For USB PD tasks, IDs must be in consecutive order and correspond to + * the port which they are for. See TASK_ID_TO_PD_PORT() macro. + * These 3 go after HOOKS and before MOTIONSENSE. Remember to add backslashes! + * TASK_ALWAYS(CHG_RAMP, chg_ramp_task, NULL, TASK_STACK_SIZE) + * TASK_ALWAYS(USB_CHG, usb_charger_task, NULL, TASK_STACK_SIZE) + * TASK_ALWAYS(CHARGER, charger_task, NULL, LARGER_TASK_STACK_SIZE) + * + * These 2 go at the end of the list. Remember proper backslashes + * TASK_ALWAYS(PD_C0, pd_task, NULL, LARGER_TASK_STACK_SIZE) + * TASK_ALWAYS(PD_C1, pd_task, NULL, LARGER_TASK_STACK_SIZE) + */ + +#define CONFIG_TASK_LIST \ + TASK_ALWAYS(HOOKS, hook_task, NULL, LARGER_TASK_STACK_SIZE) \ + TASK_ALWAYS(CHG_RAMP, chg_ramp_task, NULL, LARGER_TASK_STACK_SIZE) \ + TASK_ALWAYS(USB_CHG, usb_charger_task, NULL, TASK_STACK_SIZE) \ + TASK_ALWAYS(CHARGER, charger_task, NULL, LARGER_TASK_STACK_SIZE) \ + TASK_ALWAYS(MOTIONSENSE, motion_sense_task, NULL, VENTI_TASK_STACK_SIZE) \ + TASK_NOTEST(CHIPSET, chipset_task, NULL, LARGER_TASK_STACK_SIZE) \ + TASK_NOTEST(KEYPROTO, keyboard_protocol_task, NULL, TASK_STACK_SIZE) \ + TASK_NOTEST(PDCMD, pd_command_task, NULL, TASK_STACK_SIZE) \ + TASK_ALWAYS(HOSTCMD, host_command_task, NULL, LARGER_TASK_STACK_SIZE) \ + TASK_ALWAYS(CONSOLE, console_task, NULL, VENTI_TASK_STACK_SIZE) \ + TASK_ALWAYS(POWERBTN, power_button_task, NULL, LARGER_TASK_STACK_SIZE) \ + TASK_NOTEST(KEYSCAN, keyboard_scan_task, NULL, TASK_STACK_SIZE) \ + TASK_ALWAYS(PD_C0, pd_task, NULL, LARGER_TASK_STACK_SIZE) \ + TASK_ALWAYS(PD_C1, pd_task, NULL, LARGER_TASK_STACK_SIZE) + diff --git a/board/reef_mchp/gpio.inc b/board/reef_mchp/gpio.inc new file mode 100644 index 0000000000..754f259d79 --- /dev/null +++ b/board/reef_mchp/gpio.inc @@ -0,0 +1,340 @@ +/* -*- mode:c -*- + * + * Copyright 2016 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/* Declare symbolic names for all the GPIOs that we care about. + * Note: Those with interrupt handlers must be declared first. */ + +/* MEC1701H GPIO_0105/UART0_RX OK */ +GPIO_INT(UART0_RX, PIN(0105), GPIO_INT_BOTH_DSLEEP | GPIO_PULL_UP, \ + uart_deepsleep_interrupt) + +GPIO_INT(PCH_PLTRST_L, PIN(064), GPIO_INT_BOTH | GPIO_PULL_UP, lpcrst_interrupt) + +GPIO_INT(CHARGER_INT_L, PIN(0143), GPIO_INT_FALLING, bd9995x_vbus_interrupt) +/* CHARGER_EC_INT_ODL from BD99956 */ +/* + * TODO: The pull ups for Parade TCPC interrupt line can be removed in versions + * of board following EVT in which daughter card (which has an external pull up) + * will always be inserted. + */ +GPIO_INT(USB_C0_PD_INT_ODL, PIN(0175), GPIO_INT_FALLING, tcpc_alert_event) +/* from Analogix TCPC */ +GPIO_INT(USB_C1_PD_INT_ODL, PIN(0126), GPIO_INT_FALLING | GPIO_PULL_UP, tcpc_alert_event) +/* from Parade TCPC */ + +#ifdef CONFIG_USB_PD_TCPC_LOW_POWER +GPIO_INT(USB_C0_CABLE_DET, PIN(0246), GPIO_INT_RISING, anx74xx_cable_det_interrupt) +/* CABLE_DET from ANX3429 */ +#endif + +#ifdef CONFIG_POWER_S0IX +GPIO_INT(PCH_SLP_S0_L, PIN(050), GPIO_INT_BOTH, power_signal_interrupt) /* SLP_S0_L */ +#endif +GPIO_INT(PCH_SLP_S4_L, PIN(033), GPIO_INT_BOTH, power_signal_interrupt) /* SLP_S4_L */ +GPIO_INT(PCH_SLP_S3_L, PIN(035), GPIO_INT_BOTH, power_signal_interrupt) /* SLP_S3_L */ +GPIO_INT(SUSPWRNACK, PIN(057), GPIO_INT_BOTH, power_signal_interrupt) +GPIO_INT(RSMRST_L_PGOOD, PIN(0243), GPIO_INT_BOTH, power_signal_interrupt) /* PMIC_EC_RSMRST_ODL */ +GPIO_INT(ALL_SYS_PGOOD, PIN(0240), GPIO_INT_BOTH, power_signal_interrupt) /* PMIC_EC_PWROK_OD */ + +/* ACOK_OD from BD99956 */ +GPIO_INT(AC_PRESENT, PIN(0242), GPIO_INT_BOTH, extpower_interrupt) + +/* TODO: We might remove external pull-up for POWER_BUTTON_L in EVT */ +GPIO_INT(POWER_BUTTON_L, PIN(0241), GPIO_INT_BOTH, power_button_interrupt) /* MECH_PWR_BTN_ODL */ +GPIO_INT(LID_OPEN, PIN(0206), GPIO_INT_BOTH, lid_interrupt) +/* Volume up and down buttons need to be swapped. The one closer to the hinge + * should be volume up and the one closer to the user should be volume down. + * (cros.bug/p/60057) */ +GPIO_INT(EC_VOLDN_BTN_ODL_SWAPPED, PIN(042), GPIO_INT_BOTH | GPIO_PULL_UP, button_interrupt) +GPIO_INT(EC_VOLUP_BTN_ODL_SWAPPED, PIN(044), GPIO_INT_BOTH | GPIO_PULL_UP, button_interrupt) +#define GPIO_EC_VOLDN_BTN_ODL GPIO_EC_VOLUP_BTN_ODL_SWAPPED +#define GPIO_EC_VOLUP_BTN_ODL GPIO_EC_VOLDN_BTN_ODL_SWAPPED +/* Tablet switch is active-low. L: lid is attached (360 position) H: detached */ +GPIO_INT(TABLET_MODE_L, PIN(0207), GPIO_INT_BOTH, tablet_mode_interrupt) + +GPIO_INT(WP_L, PIN(0152), GPIO_INT_BOTH | GPIO_SEL_1P8V, switch_interrupt) /* EC_WP_ODL */ + +GPIO_INT(BASE_SIXAXIS_INT_L, PIN(0131), GPIO_INT_FALLING | GPIO_SEL_1P8V, + bmi160_interrupt) +GPIO(LID_ACCEL_INT_L, PIN(014), GPIO_INPUT | GPIO_SEL_1P8V) + +/* I2C GPIOs will be set to alt. function later. */ +GPIO(EC_I2C_GYRO_SDA, PIN(0132), GPIO_INPUT) /* original reef | GPIO_SEL_1P8V */ +GPIO(EC_I2C_GYRO_SCL, PIN(0140), GPIO_INPUT) /* original reef | GPIO_SEL_1P8V */ +GPIO(EC_I2C_SENSOR_SDA, PIN(012), GPIO_INPUT) /* original reef | GPIO_SEL_1P8V */ +GPIO(EC_I2C_SENSOR_SCL, PIN(013), GPIO_INPUT) /* original reef | GPIO_SEL_1P8V */ +GPIO(EC_I2C_USB_C0_PD_SDA, PIN(003), GPIO_INPUT) +GPIO(EC_I2C_USB_C0_PD_SCL, PIN(004), GPIO_INPUT) +GPIO(EC_I2C_USB_C1_PD_SDA, PIN(0154), GPIO_INPUT) +GPIO(EC_I2C_USB_C1_PD_SCL, PIN(0155), GPIO_INPUT) +GPIO(EC_I2C_POWER_SDA, PIN(007), GPIO_INPUT) +GPIO(EC_I2C_POWER_SCL, PIN(010), GPIO_INPUT) + +/* + * LPC: + * Pins 46, 47, 51, 52, 53, 54, 55, default to LPC mode. + * Pin 56 (CLKRUN#) defaults to GPIO mode. + * Pin 57 (SER_IRQ) defaults to LPC mode, but we also have EC_PCH_KB_INT_ODL + * (Pin B0) in case it doesn't work (Set CONFIG_KEYBOARD_IRQ_GPIO in this case). + * + * See also the NO_LPC_ESPI bit in DEVALT1 and the CONFIG_HOSTCMD_SPS option. + */ + +GPIO(PCH_SMI_L, PIN(0227), GPIO_ODR_HIGH | GPIO_SEL_1P8V) /* EC_SMI_ODL */ +GPIO(PCH_SCI_L, PIN(0222), GPIO_ODR_HIGH | GPIO_SEL_1P8V) /* EC_SCI_ODL */ +#ifndef CONFIG_POWER_S0IX +GPIO(PCH_SLP_S0_L, PIN(050), GPIO_INPUT) /* SLP_S0_L */ +#endif + +/* + * BRD_ID1 is a an ADC pin which will be used to measure multiple values. + * Assert EC_BRD_ID_EN_ODL and then read BRD_ID1. + */ +ALTERNATE(PIN_MASK(4, 0x04), 1, MODULE_ADC, 0) /* GPIO 0202 bank=4 bit=2 func=1 ADC02 */ +GPIO(EC_BRD_ID_EN_ODL, PIN(0221), GPIO_INPUT) + +GPIO(CCD_MODE_ODL, PIN(0203), GPIO_INPUT) +GPIO(EC_HAVEN_RESET_ODL, PIN(034), GPIO_ODR_HIGH) +GPIO(ENTERING_RW, PIN(0254), GPIO_OUTPUT) /* EC_ENTERING_RW */ + +GPIO(PCH_RSMRST_L, PIN(0165), GPIO_OUT_LOW | GPIO_PULL_UP) +GPIO(EC_BATT_PRES_L, PIN(0204), GPIO_INPUT) +GPIO(PMIC_EN, PIN(0245), GPIO_OUT_LOW) +GPIO(EN_PP3300, PIN(023), GPIO_OUT_LOW) +GPIO(PP3300_PG, PIN(0156), GPIO_INPUT | GPIO_PULL_UP) +GPIO(EN_PP5000, PIN(051), GPIO_OUT_LOW) +GPIO(PP5000_PG, PIN(0157), GPIO_INPUT | GPIO_PULL_UP) +GPIO(EN_P3300_TRACKPAD_ODL, PIN(043), GPIO_ODR_LOW) +/* Control the gate for trackpad IRQ. High closes the gate. + * This is always set low so that the OS can manage the trackpad. */ +GPIO(TRACKPAD_INT_GATE, PIN(054), GPIO_OUT_LOW) +GPIO(PCH_SYS_PWROK, PIN(0106), GPIO_OUT_LOW) /* EC_PCH_PWROK */ +GPIO(ENABLE_BACKLIGHT, PIN(002), GPIO_ODR_HIGH | GPIO_SEL_1P8V) /* EC_BL_EN_OD */ + +GPIO(WIRELESS_GPIO_WLAN_POWER, PIN(0142), GPIO_ODR_HIGH) /* EN_PP3300_WLAN_ODL */ + +/* + * PCH_PROCHOT_ODL is primarily for monitoring the PROCHOT# signal which is + * normally driven by the PMIC. The EC can also drive this signal in the event + * that the ambient or charger temperature sensors exceeds their thresholds. + */ +GPIO(CPU_PROCHOT, PIN(0114), GPIO_INPUT | GPIO_SEL_1P8V) /* PCH_PROCHOT_ODL */ + +GPIO(PCH_PWRBTN_L, PIN(0244), GPIO_ODR_HIGH) /* EC_PCH_PWR_BTN_ODL */ +GPIO(PCH_WAKE_L, PIN(0115), GPIO_ODR_HIGH) /* EC_PCH_WAKE_ODL */ +GPIO(USB_C0_HPD_1P8_ODL, PIN(052), GPIO_INPUT | GPIO_SEL_1P8V) +GPIO(USB_C1_HPD_1P8_ODL, PIN(0151), GPIO_INPUT | GPIO_SEL_1P8V) + +GPIO(USB2_OTG_VBUSSENSE, PIN(053), GPIO_OUTPUT) + +/* EC_PCH_RTCRST is a sledgehammer for resetting SoC state and should rarely + * be used. Set as input for now, we'll set it as an output when we want to use + * it. Has external pull-down resistor. */ +GPIO(EC_PCH_RTCRST, PIN(0205), GPIO_INPUT) +/* Latest code (2018-03-28) in power/intel_x86.c uses SYS_RESET_L signal name + * Previous Reef used PCH_RCIN_L + */ +GPIO(SYS_RESET_L, PIN(036), GPIO_ODR_HIGH) /* SYS_RST_ODL */ + +/* FIXME: What, if anything, to do about EC_RST_ODL on VCC1_RST#? */ + +GPIO(CHARGER_RST_ODL, PIN(0141), GPIO_ODR_HIGH) +GPIO(USB_A_CHARGE_EN_L, PIN(022), GPIO_OUT_LOW) +GPIO(EN_USB_TCPC_PWR, PIN(0100), GPIO_OUT_LOW) +GPIO(USB1_ENABLE, PIN(0144), GPIO_OUT_LOW) + +GPIO(USB_C0_PD_RST_L, PIN(024), GPIO_OUT_LOW) /* USB_C0_PD_RST_L */ +GPIO(USB_C1_PD_RST_ODL, PIN(0127), GPIO_ODR_LOW) + +/* + * Configure as input to enable @ 1.5A, output-low to turn off, or output-high + * to enable @ 3A. + */ +GPIO(USB_C0_5V_EN, PIN(011), GPIO_OUT_LOW | GPIO_PULL_UP) /* EN_USB_C0_5V_OUT, Enable C0 */ +GPIO(USB_C1_5V_EN, PIN(061), GPIO_OUT_LOW | GPIO_PULL_UP) /* EN_USB_C1_5V_OUT, Enable C1 */ + +/* Clear for non-HDI breakout, must be pulled high */ +/* reefmchp board note: following 3 GPIOs are not NC on reef board, which are not mapping to MEC1701 */ +//GPIO(NC1, PIN(0154), GPIO_INPUT | GPIO_PULL_UP | GPIO_SEL_1P8V) +//GPIO(NC2, PIN(0155), GPIO_INPUT | GPIO_PULL_UP | GPIO_SEL_1P8V) + +//GPIO(ENG_STRAP, PIN(0156), GPIO_INPUT) + +GPIO(BAT_LED_BLUE, PIN(0153), GPIO_OUT_HIGH) +GPIO(BAT_LED_AMBER, PIN(0226), GPIO_OUT_HIGH) + +/* + * MEC1701H + * GPIO_0055/PWM2/SHD_CS0#/RSMRST# + * GPIO_0124/GPTP-OUT6/PVT_CS#/KSO11 + * QMSPI controller drives chip select, must be + * configured to alternative function. See below. + * Always use the name QMSPI_CS0 for chip select. + * Actual GPIO could be GPIO_0055 QMSPI shared chip select or + * GPIO_0124 private chip select. + */ +GPIO(QMSPI_CS0, PIN(055), GPIO_ODR_HIGH) + +/* + * Alternate function pins + */ + +/* + * MEC1701H SHD SPI is connected to QMSPI controller. + * QMSPI drives chip select. SHD_CS0#(GPIO_0055) must be set + * to alternate function 2 and GPIO_ODR_HIGH. + * GPIO_0055 Function 2, Bank 1 bit[13] + */ +ALTERNATE(PIN_MASK(1, 0x2000), 2, MODULE_SPI_FLASH, GPIO_ODR_HIGH) +/* SHD_CLK - GPIO_0056 Function 2, Bank 1 bit[14] */ +ALTERNATE(PIN_MASK(1, 0x4000), 2, MODULE_SPI_FLASH, 0) +/* MOSI(SHD_IO0) - GPIO_0223 Function 2, Bank 4 bit[19] */ +/* MISO(SHD_IO1) - GPIO_0224 Function 2, Bank 4 bit[20] */ +ALTERNATE(PIN_MASK(4, 0x180000), 2, MODULE_SPI_FLASH, 0) + +/* MEC1701H LPC all alternate function 1 + * bank bit + * GPIO061 LPCPD# 1 17 + * GPIO063 SER_IRQ 1 19 + * GPIO064 LRESET# 1 20 need internal pull-up + * GPIO065 PCI_CLK 1 21 + * GPIO066 LFRAME# 1 22 + * GPIO067 CLKRUN# 1 23 + * GPIO070 LAD0 1 24 + * GPIO071 LAD1 1 25 + * GPIO072 LAD2 1 26 + * GPIO073 LAD3 1 27 + */ +ALTERNATE(PIN_MASK(1, 0x0FF80000), 1, MODULE_LPC, 0) +ALTERNATE(PIN_MASK(1, 0x00100000), 1, MODULE_LPC, GPIO_PULL_UP | GPIO_INT_BOTH) + +/* Keyboard pins */ +#define GPIO_KB_INPUT (GPIO_INPUT | GPIO_PULL_UP) +#define GPIO_KB_OUTPUT (GPIO_ODR_HIGH) +#define GPIO_KB_OUTPUT_COL2 (GPIO_OUT_LOW) + +/* + * 8 x 13 key scan matrix + * MEC1704H (144 pin package) + * + * KSI0 = GPIO_0017 Func3 bank 0 bit 15 + * KSI1 = GPIO_0020 Func3 bank 0 bit 16 + * KSI2 = GPIO_0021 Func3 bank 0 bit 17 + * KSI3 = GPIO_0026 Func3 bank 0 bit 22 + * KSI4 = GPIO_0027 Func3 bank 0 bit 23 + * KSI5 = GPIO_0030 Func3 bank 0 bit 24 + * KSI6 = GPIO_0031 Func3 bank 0 bit 25 + * KSI7 = GPIO_0032 Func3 bank 0 bit 26 + * + * KSO00 = GPIO_0040 Func3 bank 1 bit 0 + * KSO01 = GPIO_0045 Func3 bank 1 bit 5 + * KSO02 = GPIO_0046 Func3 bank 1 bit 6 + * KSO03 = GPIO_0047 Func3 bank 1 bit 7 + * KSO04 = GPIO_0107 Func3 bank 2 bit 7 + * KSO05 = GPIO_0112 Func3 bank 2 bit 10 + * KSO06 = GPIO_0113 Func3 bank 2 bit 11 + * KSO07 = GPIO_0120 Func3 bank 2 bit 16 + * KSO08 = GPIO_0121 Func3 bank 2 bit 17 + * KSO09 = GPIO_0122 Func3 bank 2 bit 18 + * KSO10 = GPIO_0123 Func3 bank 2 bit 19 + * KSO11 = GPIO_0124 Func3 bank 2 bit 20 + * KSO12 = GPIO_0125 Func3 bank 2 bit 21 + */ +/* KSI 0-7, Bank 0, Func3, bits 15-17, 22-26 */ +ALTERNATE(PIN_MASK(0, 0x07C38000), 3, MODULE_KEYBOARD_SCAN, GPIO_KB_INPUT) +/* KSO 4-12, Bank 2, Func3, bits 7, 10-11, 16-21 */ +ALTERNATE(PIN_MASK(2, 0x003F0C80), 3, MODULE_KEYBOARD_SCAN, GPIO_KB_OUTPUT) + +#ifdef CONFIG_KEYBOARD_COL2_INVERTED +/* KSO 0,1,3 Bank 1, Func3, bits 0, 5-7 */ +ALTERNATE(PIN_MASK(1, 0xA1), 3, MODULE_KEYBOARD_SCAN, GPIO_KB_OUTPUT) +GPIO(KBD_KSO2, PIN(046), GPIO_KB_OUTPUT_COL2) +#else +/* KSO 0-3 Bank 1, Func3, bits 0, 5-7 */ +ALTERNATE(PIN_MASK(1, 0xE1), 3, MODULE_KEYBOARD_SCAN, GPIO_KB_OUTPUT) +#endif + + +/* MEC1701H ADC01=GPIO201 Func1, ADC00=GPIO200 Func 1 + * Bank 1 bits[1:0] + * TEMP_SENSOR_AMB (GPIO201) and TEMP_SENSOR_CHARGER (GPIO200) + */ +ALTERNATE(PIN_MASK(4, 0x03), 1, MODULE_ADC, 0) + +/* MEC1701H implements I2C[0,2,3,6,7] + * We need 5 ports. + * I2C00_SDA is GPIO003 Func1, I2C00_SCL is GPIO004 Func1 bank 0 bits[3:4] + * I2C03_SDA is GPIO007 Func1, I2C03_SCL is GPIO010 Func1 bank 0 bits[7:8] + * I2C07_SDA is GPIO012 Func1, I2C07_SCL is GPIO013 Func1 bank 0 bits[10:11] + * I2C06_SDA is GPIO132 Func1, I2C06_SCL is GPIO140 Func1 bank 2 bits[26]; bank 3 bits[0] + * I2C02_SDA is GPIO154 Func1, I2C02_SCL is GPIO155 Func1 bank 3 bits[12:13] + */ +/* GPIO003-004 for EC_I2C_USB_C0_PD_SDA/SCL */ +/* GPIO007-010 for EC_I2C_POWER_SDA/SCL */ +/* GPIO012-013 for EC_I2C_SENSOR_SDA/SCL */ +ALTERNATE(PIN_MASK(0, 0x00000D98), 1, MODULE_I2C, 0) +/* GPIO132 for EC_I2C_GYRO_SDA */ +ALTERNATE(PIN_MASK(2, 0x04000000), 1, MODULE_I2C, 0) +/* GPIO140 for EC_I2C_GYRO_SCL */ +/* GPIO154-155 for EC_I2C_USB_C1_PD_SDA/SCL */ +ALTERNATE(PIN_MASK(3, 0x00003001), 1, MODULE_I2C, 0) + +/* + * PWM4 = GPIO001 Func1 + * PWM5 = GPIO002 Func1 + */ +/* reefmchp board note: not PWM in reef or reedmchp boards design?? */ +//ALTERNATE(PIN_MASK(0, 0x00000006), 1, MODULE_PWM, 0) + +/* + * GPIO_0104(UART0_TX) Func1 + * GPIO_0105(UART0_RX) Func1 + * Bank 2 bits[4:5] + */ +ALTERNATE(PIN_MASK(2, 0x30), 1, MODULE_UART, 0) + +/* + * MCHP TFDP alternate function configuration + * GPIO 0170 = clock, 0171 = data both function 1 + * Port = 3 bits[24:25] + */ +ALTERNATE(PIN_MASK(3, 0x03000000), 1, MODULE_TFDP, 0) + +/* reefmchp board note: specific for reedmchp board only */ + +/* GPIO101 - enable high accurate reference voltage regulator MAX6070 + 1 - enable regulator, in normal runtime + 0 - disable regulator, in low power mode + */ +GPIO(VOL_REGULATOR_EN, PIN(0101), GPIO_OUT_HIGH) + +/* GPIO015 - enable 3.3V / 1.8V level switch TXS0108 + 1 - enable level switch, in normal runtime + 0 - disable level switch, in low power mode + */ +GPIO(LEVEL_SW_EN, PIN(015), GPIO_OUT_HIGH | GPIO_SEL_1P8V) + +/* DEBUG I2C */ +GPIO(GP025, PIN(025), GPIO_OUT_HIGH | GPIO_PULL_UP) + +/* Low power deep sleep test. GPIO_0060 Function 2 48MHZ_OUT */ +ALTERNATE(PIN_MASK(1, 0x10000), 2, MODULE_CHIPSET, 0) + +/* Unused pins - on test header J47 */ +/* Clear for non-HDI breakout, must be pulled high */ +GPIO(NC1_UNUSED, PIN(062), GPIO_INPUT | GPIO_PULL_UP) +GPIO(NC2_UNUSED, PIN(0102), GPIO_INPUT | GPIO_PULL_UP) +GPIO(NC3_UNUSED, PIN(000), GPIO_INPUT | GPIO_PULL_UP) +GPIO(NC4_UNUSED, PIN(0130), GPIO_INPUT | GPIO_PULL_UP) +/* GPIO(NC5_UNUSED, PIN(060), GPIO_INPUT | GPIO_PULL_UP) */ +/* use this for low power mode test */ +/* ALTERNATE(PIN_MASK(1, 0x00010000), 2, MODULE_GPIO, 0) */ +GPIO(NC6_UNUSED, PIN(0161), GPIO_INPUT | GPIO_PULL_UP) +/* GPIO(NC7_UNUSED, PIN(025), GPIO_INPUT | GPIO_PULL_UP) */ +GPIO(NC8_UNUSED, PIN(0162), GPIO_INPUT | GPIO_PULL_UP) +GPIO(NC9_UNUSED, PIN(0172), GPIO_INPUT | GPIO_PULL_UP) +GPIO(NC10_UNUSED, PIN(0163), GPIO_INPUT | GPIO_PULL_UP) diff --git a/board/reef_mchp/led.c b/board/reef_mchp/led.c new file mode 100644 index 0000000000..ca49fe4ed5 --- /dev/null +++ b/board/reef_mchp/led.c @@ -0,0 +1,157 @@ +/* Copyright 2016 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + * + * Power and battery LED control for Reef + */ + +#include "battery.h" +#include "charge_state.h" +#include "chipset.h" +#include "ec_commands.h" +#include "extpower.h" +#include "gpio.h" +#include "hooks.h" +#include "host_command.h" +#include "led_common.h" +#include "util.h" + +#define BAT_LED_ON 0 +#define BAT_LED_OFF 1 + +#define CRITICAL_LOW_BATTERY_PERCENTAGE 3 +#define LOW_BATTERY_PERCENTAGE 10 + +#define LED_TOTAL_4SECS_TICKS 4 +#define LED_TOTAL_2SECS_TICKS 2 +#define LED_ON_1SEC_TICKS 1 +#define LED_ON_2SECS_TICKS 2 + +const enum ec_led_id supported_led_ids[] = { + EC_LED_ID_BATTERY_LED}; + +const int supported_led_ids_count = ARRAY_SIZE(supported_led_ids); + +enum led_color { + LED_OFF = 0, + LED_BLUE, + LED_AMBER, + LED_COLOR_COUNT /* Number of colors, not a color itself */ +}; + +static int led_set_color_battery(enum led_color color) +{ + switch (color) { + case LED_OFF: + gpio_set_level(GPIO_BAT_LED_BLUE, BAT_LED_OFF); + gpio_set_level(GPIO_BAT_LED_AMBER, BAT_LED_OFF); + break; + case LED_BLUE: + gpio_set_level(GPIO_BAT_LED_BLUE, BAT_LED_ON); + gpio_set_level(GPIO_BAT_LED_AMBER, BAT_LED_OFF); + break; + case LED_AMBER: + gpio_set_level(GPIO_BAT_LED_BLUE, BAT_LED_OFF); + gpio_set_level(GPIO_BAT_LED_AMBER, BAT_LED_ON); + break; + default: + return EC_ERROR_UNKNOWN; + } + return EC_SUCCESS; +} + +void led_get_brightness_range(enum ec_led_id led_id, uint8_t *brightness_range) +{ + brightness_range[EC_LED_COLOR_BLUE] = 1; + brightness_range[EC_LED_COLOR_AMBER] = 1; +} + +static int led_set_color(enum ec_led_id led_id, enum led_color color) +{ + int rv; + + switch (led_id) { + case EC_LED_ID_BATTERY_LED: + rv = led_set_color_battery(color); + break; + default: + return EC_ERROR_UNKNOWN; + } + return rv; +} + +int led_set_brightness(enum ec_led_id led_id, const uint8_t *brightness) +{ + if (brightness[EC_LED_COLOR_BLUE] != 0) + led_set_color(led_id, LED_BLUE); + else if (brightness[EC_LED_COLOR_AMBER] != 0) + led_set_color(led_id, LED_AMBER); + else + led_set_color(led_id, LED_OFF); + + return EC_SUCCESS; +} + +static void led_set_battery(void) +{ + static int battery_ticks; + static int suspend_ticks; + + switch (charge_get_state()) { + case PWR_STATE_CHARGE: + led_set_color_battery(LED_AMBER); + break; + case PWR_STATE_DISCHARGE_FULL: + if (extpower_is_present()) { + led_set_color_battery(LED_BLUE); + break; + } + /* Intentional fall-through */ + case PWR_STATE_DISCHARGE /* and PWR_STATE_DISCHARGE_FULL */: + if (chipset_in_state(CHIPSET_STATE_ON)) { + led_set_color_battery(LED_BLUE); + } else if (chipset_in_state(CHIPSET_STATE_ANY_SUSPEND)) { + /* Blink once every four seconds. */ + led_set_color_battery( + (suspend_ticks % LED_TOTAL_4SECS_TICKS) + < LED_ON_1SEC_TICKS ? LED_AMBER : LED_OFF); + } else { + led_set_color_battery(LED_OFF); + } + break; + case PWR_STATE_ERROR: + led_set_color_battery( + (battery_ticks % LED_TOTAL_2SECS_TICKS < + LED_ON_1SEC_TICKS) ? LED_AMBER : LED_OFF); + break; + case PWR_STATE_CHARGE_NEAR_FULL: + led_set_color_battery(LED_BLUE); + break; + case PWR_STATE_IDLE: /* External power connected in IDLE */ + if (charge_get_flags() & CHARGE_FLAG_FORCE_IDLE) + led_set_color_battery( + (battery_ticks % LED_TOTAL_4SECS_TICKS < + LED_ON_2SECS_TICKS) ? LED_AMBER : LED_BLUE); + else + led_set_color_battery(LED_BLUE); + break; + default: + /* Other states don't alter LED behavior */ + break; + } + + battery_ticks++; + suspend_ticks++; +} + +/* Called by hook task every 1 sec */ +static void led_second(void) +{ + /* + * Reference board only has one LED, so overload it to act as both + * power LED and battery LED. + */ + if (led_auto_control_is_enabled(EC_LED_ID_BATTERY_LED)) + led_set_battery(); +} +DECLARE_HOOK(HOOK_SECOND, led_second, HOOK_PRIO_DEFAULT); diff --git a/board/reef_mchp/lfw/gpio.inc b/board/reef_mchp/lfw/gpio.inc new file mode 100644 index 0000000000..b190f000c6 --- /dev/null +++ b/board/reef_mchp/lfw/gpio.inc @@ -0,0 +1,43 @@ +/* -*- mode:c -*- + * + * Copyright (c) 2015 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + * + * Minimal set of GPIOs needed for LFW loader + */ + +/* + * MEC1701H GPIO_0055/PWM2/SHD_CS0#/RSMRST# + * MEC1701H QMSPI controller drives chip select, must be + * configured to alternative function. See below. + * GPIO_SHD_CS0 is used in board level spi_devices[] table + */ +GPIO(QMSPI_CS0, PIN(055), GPIO_ODR_HIGH) + + +/* Alternate functions GPIO definition */ + +/* + * UART + * GPIO_0104(UART0_TX) Func1 + * GPIO_0105(UART0_RX) Func1 + * Bank 2 bits[4:5] +*/ +ALTERNATE(PIN_MASK(2, 0x30), 1, MODULE_UART, 0) + +/* SPI pins */ +/* + * MEC1701H SHD SPI is connected to QMSPI controller. + * QMSPI drives chip select. SHD_CS0#(GPIO_0055) must be set + * to alternate function 2 and GPIO_ODR_HIGH. + * GPIO_0055 Function 2, Bank 1 bit[13] + */ +ALTERNATE(PIN_MASK(1, 0x2000), 2, MODULE_SPI_FLASH, GPIO_ODR_HIGH) +/* SHD_CLK - GPIO_0056 Function 2, Bank 1 bit[14] */ +ALTERNATE(PIN_MASK(1, 0x4000), 2, MODULE_SPI_FLASH, 0) +/* MOSI(SHD_IO0) - GPIO_0223 Function 2, Bank 4 bit[19] */ +/* MISO(SHD_IO1) - GPIO_0224 Function 2, Bank 4 bit[20] */ +ALTERNATE(PIN_MASK(4, 0x180000), 2, MODULE_SPI_FLASH, 0) + + diff --git a/board/reef_mchp/usb_pd_policy.c b/board/reef_mchp/usb_pd_policy.c new file mode 100644 index 0000000000..515fe0bfb3 --- /dev/null +++ b/board/reef_mchp/usb_pd_policy.c @@ -0,0 +1,427 @@ +/* Copyright 2016 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include "atomic.h" +#include "extpower.h" +#include "charge_manager.h" +#include "common.h" +#include "console.h" +#include "driver/charger/bd9995x.h" +#include "driver/tcpm/anx74xx.h" +#include "driver/tcpm/ps8xxx.h" +#include "gpio.h" +#include "hooks.h" +#include "host_command.h" +#include "registers.h" +#include "system.h" +#include "task.h" +#include "timer.h" +#include "util.h" +#include "usb_mux.h" +#include "usb_pd.h" +#include "usb_pd_tcpm.h" + +#include "tfdp_chip.h" + +#define CPRINTF(format, args...) cprintf(CC_USBPD, format, ## args) +#define CPRINTS(format, args...) cprints(CC_USBPD, format, ## args) + +#define PDO_FIXED_FLAGS (PDO_FIXED_DUAL_ROLE | PDO_FIXED_DATA_SWAP |\ + PDO_FIXED_COMM_CAP) + +/* TODO: fill in correct source and sink capabilities */ +const uint32_t pd_src_pdo[] = { + PDO_FIXED(5000, 1500, PDO_FIXED_FLAGS), +}; +const int pd_src_pdo_cnt = ARRAY_SIZE(pd_src_pdo); +const uint32_t pd_src_pdo_max[] = { + PDO_FIXED(5000, 3000, PDO_FIXED_FLAGS), +}; +const int pd_src_pdo_max_cnt = ARRAY_SIZE(pd_src_pdo_max); + +const uint32_t pd_snk_pdo[] = { + PDO_FIXED(5000, 500, PDO_FIXED_FLAGS), + PDO_BATT(4750, 21000, 15000), + PDO_VAR(4750, 21000, 3000), +}; +const int pd_snk_pdo_cnt = ARRAY_SIZE(pd_snk_pdo); + +int pd_is_valid_input_voltage(int mv) +{ + return 1; +} + +void pd_transition_voltage(int idx) +{ + /* No-operation: we are always 5V */ +} + +static uint8_t vbus_en[CONFIG_USB_PD_PORT_COUNT]; +static uint8_t vbus_rp[CONFIG_USB_PD_PORT_COUNT] = {TYPEC_RP_1A5, TYPEC_RP_1A5}; + +int board_vbus_source_enabled(int port) +{ + return vbus_en[port]; +} + +static void board_vbus_update_source_current(int port) +{ + enum gpio_signal gpio = port ? GPIO_USB_C1_5V_EN : GPIO_USB_C0_5V_EN; + int flags = (vbus_rp[port] == TYPEC_RP_1A5 && vbus_en[port]) ? + (GPIO_INPUT | GPIO_PULL_UP) : (GPIO_OUTPUT | GPIO_PULL_UP); + + /* + * Driving USB_Cx_5V_EN high, actually put a 16.5k resistance + * (2x 33k in parallel) on the NX5P3290 load switch ILIM pin, + * setting a minimum OCP current of 3186 mA. + * Putting an internal pull-up on USB_Cx_5V_EN, effectively put a 33k + * resistor on ILIM, setting a minimum OCP current of 1505 mA. + */ + gpio_set_level(gpio, vbus_en[port]); + gpio_set_flags(gpio, flags); +} + +void typec_set_source_current_limit(int port, int rp) +{ + vbus_rp[port] = rp; + + /* change the GPIO driving the load switch if needed */ + board_vbus_update_source_current(port); +} + +int pd_set_power_supply_ready(int port) +{ + /* Ensure we're not charging from this port */ + bd9995x_select_input_port(port, 0); + + /* Ensure we advertise the proper available current quota */ + charge_manager_source_port(port, 1); + + pd_set_vbus_discharge(port, 0); + /* Provide VBUS */ + vbus_en[port] = 1; + board_vbus_update_source_current(port); + + /* notify host of power info change */ + pd_send_host_event(PD_EVENT_POWER_CHANGE); + + return EC_SUCCESS; /* we are ready */ +} + +void pd_power_supply_reset(int port) +{ + int prev_en; + + prev_en = vbus_en[port]; + + /* Disable VBUS */ + vbus_en[port] = 0; + board_vbus_update_source_current(port); + + /* Enable discharge if we were previously sourcing 5V */ + if (prev_en) + pd_set_vbus_discharge(port, 1); + + /* Give back the current quota we are no longer using */ + charge_manager_source_port(port, 0); + + /* notify host of power info change */ + pd_send_host_event(PD_EVENT_POWER_CHANGE); +} + +int pd_board_checks(void) +{ + return EC_SUCCESS; +} + +int pd_check_power_swap(int port) +{ + /* + * Allow power swap as long as we are acting as a dual role device, + * otherwise assume our role is fixed (not in S0 or console command + * to fix our role). + */ + return pd_get_dual_role() == PD_DRP_TOGGLE_ON ? 1 : 0; +} + +/* + * Allow data swap if we are a UFP, otherwise don't allow. + * + * When we are still in the Read-Only firmware, avoid swapping roles + * so we don't jump in RW as a SNK/DFP and potentially confuse the + * power supply by sending a soft-reset with wrong data role. + */ +/* + * !!! WARNING !!! + * Do no put debug in such as MCHP TFDP trace calls + * in this function. This function is pulled into the + * util/genvif code. + */ +int pd_check_data_swap(int port, int data_role) +{ + return (data_role == PD_ROLE_UFP) && + (system_get_image_copy() != SYSTEM_IMAGE_RO) ? 1 : 0; +} + +int pd_check_vconn_swap(int port) +{ + /* in G3, do not allow vconn swap since pp5000_A rail is off */ + return gpio_get_level(GPIO_EN_PP5000); +} + +void pd_execute_data_swap(int port, int data_role) +{ + /* Do nothing */ +} + +void pd_check_pr_role(int port, int pr_role, int flags) +{ + /* + * If partner is dual-role power and dualrole toggling is on, consider + * if a power swap is necessary. + */ + if ((flags & PD_FLAGS_PARTNER_DR_POWER) && + pd_get_dual_role() == PD_DRP_TOGGLE_ON) { + /* + * If we are a sink and partner is not externally powered, then + * swap to become a source. If we are source and partner is + * externally powered, swap to become a sink. + */ + int partner_extpower = flags & PD_FLAGS_PARTNER_EXTPOWER; + + if ((!partner_extpower && pr_role == PD_ROLE_SINK) || + (partner_extpower && pr_role == PD_ROLE_SOURCE)) + pd_request_power_swap(port); + } +} + +void pd_check_dr_role(int port, int dr_role, int flags) +{ + /* If UFP, try to switch to DFP */ + if ((flags & PD_FLAGS_PARTNER_DR_DATA) && + dr_role == PD_ROLE_UFP && + system_get_image_copy() != SYSTEM_IMAGE_RO) + pd_request_data_swap(port); +} +/* ----------------- Vendor Defined Messages ------------------ */ +const struct svdm_response svdm_rsp = { + .identity = NULL, + .svids = NULL, + .modes = NULL, +}; + +int pd_custom_vdm(int port, int cnt, uint32_t *payload, + uint32_t **rpayload) +{ + int cmd = PD_VDO_CMD(payload[0]); + uint16_t dev_id = 0; + int is_rw, is_latest; + + /* make sure we have some payload */ + if (cnt == 0) + return 0; + + switch (cmd) { + case VDO_CMD_VERSION: + /* guarantee last byte of payload is null character */ + *(payload + cnt - 1) = 0; + CPRINTF("version: %s\n", (char *)(payload+1)); + break; + case VDO_CMD_READ_INFO: + case VDO_CMD_SEND_INFO: + /* copy hash */ + if (cnt == 7) { + dev_id = VDO_INFO_HW_DEV_ID(payload[6]); + is_rw = VDO_INFO_IS_RW(payload[6]); + + is_latest = pd_dev_store_rw_hash(port, + dev_id, + payload + 1, + is_rw ? + SYSTEM_IMAGE_RW : + SYSTEM_IMAGE_RO); + + /* + * Send update host event unless our RW hash is + * already known to be the latest update RW. + */ + if (!is_rw || !is_latest) + pd_send_host_event(PD_EVENT_UPDATE_DEVICE); + + CPRINTF("DevId:%d.%d SW:%d RW:%d\n", + HW_DEV_ID_MAJ(dev_id), + HW_DEV_ID_MIN(dev_id), + VDO_INFO_SW_DBG_VER(payload[6]), + is_rw); + } else if (cnt == 6) { + /* really old devices don't have last byte */ + pd_dev_store_rw_hash(port, dev_id, payload + 1, + SYSTEM_IMAGE_UNKNOWN); + } + break; + case VDO_CMD_CURRENT: + CPRINTF("Current: %dmA\n", payload[1]); + break; + case VDO_CMD_FLIP: + usb_mux_flip(port); + break; +#ifdef CONFIG_USB_PD_LOGGING + case VDO_CMD_GET_LOG: + pd_log_recv_vdm(port, cnt, payload); + break; +#endif /* CONFIG_USB_PD_LOGGING */ + } + + return 0; +} + +#ifdef CONFIG_USB_PD_ALT_MODE_DFP +static int dp_flags[CONFIG_USB_PD_PORT_COUNT]; +static uint32_t dp_status[CONFIG_USB_PD_PORT_COUNT]; + +static void svdm_safe_dp_mode(int port) +{ + /* make DP interface safe until configure */ + dp_flags[port] = 0; + dp_status[port] = 0; + usb_mux_set(port, TYPEC_MUX_NONE, + USB_SWITCH_CONNECT, pd_get_polarity(port)); +} + +static int svdm_enter_dp_mode(int port, uint32_t mode_caps) +{ + /* Only enter mode if device is DFP_D capable */ + if (mode_caps & MODE_DP_SNK) { + svdm_safe_dp_mode(port); + return 0; + } + + return -1; +} + +static int svdm_dp_status(int port, uint32_t *payload) +{ + int opos = pd_alt_mode(port, USB_SID_DISPLAYPORT); + + payload[0] = VDO(USB_SID_DISPLAYPORT, 1, + CMD_DP_STATUS | VDO_OPOS(opos)); + payload[1] = VDO_DP_STATUS(0, /* HPD IRQ ... not applicable */ + 0, /* HPD level ... not applicable */ + 0, /* exit DP? ... no */ + 0, /* usb mode? ... no */ + 0, /* multi-function ... no */ + (!!(dp_flags[port] & DP_FLAGS_DP_ON)), + 0, /* power low? ... no */ + (!!(dp_flags[port] & DP_FLAGS_DP_ON))); + return 2; +}; + +static int svdm_dp_config(int port, uint32_t *payload) +{ + int opos = pd_alt_mode(port, USB_SID_DISPLAYPORT); + int mf_pref = PD_VDO_DPSTS_MF_PREF(dp_status[port]); + int pin_mode = pd_dfp_dp_get_pin_mode(port, dp_status[port]); + + if (!pin_mode) + return 0; + + usb_mux_set(port, mf_pref ? TYPEC_MUX_DOCK : TYPEC_MUX_DP, + USB_SWITCH_CONNECT, pd_get_polarity(port)); + + payload[0] = VDO(USB_SID_DISPLAYPORT, 1, + CMD_DP_CONFIG | VDO_OPOS(opos)); + payload[1] = VDO_DP_CFG(pin_mode, /* pin mode */ + 1, /* DPv1.3 signaling */ + 2); /* UFP connected */ + return 2; +}; + +static void svdm_dp_post_config(int port) +{ + const struct usb_mux *mux = &usb_muxes[port]; + + dp_flags[port] |= DP_FLAGS_DP_ON; + if (!(dp_flags[port] & DP_FLAGS_HPD_HI_PENDING)) + return; + mux->hpd_update(port, 1, 0); +} + +static int svdm_dp_attention(int port, uint32_t *payload) +{ + int lvl = PD_VDO_DPSTS_HPD_LVL(payload[1]); + int irq = PD_VDO_DPSTS_HPD_IRQ(payload[1]); + const struct usb_mux *mux = &usb_muxes[port]; + + dp_status[port] = payload[1]; + if (!(dp_flags[port] & DP_FLAGS_DP_ON)) { + if (lvl) + dp_flags[port] |= DP_FLAGS_HPD_HI_PENDING; + return 1; + } + mux->hpd_update(port, lvl, irq); + + /* ack */ + return 1; +} + +static void svdm_exit_dp_mode(int port) +{ + const struct usb_mux *mux = &usb_muxes[port]; + + svdm_safe_dp_mode(port); + mux->hpd_update(port, 0, 0); +} + +static int svdm_enter_gfu_mode(int port, uint32_t mode_caps) +{ + /* Always enter GFU mode */ + return 0; +} + +static void svdm_exit_gfu_mode(int port) +{ +} + +static int svdm_gfu_status(int port, uint32_t *payload) +{ + /* + * This is called after enter mode is successful, send unstructured + * VDM to read info. + */ + pd_send_vdm(port, USB_VID_GOOGLE, VDO_CMD_READ_INFO, NULL, 0); + return 0; +} + +static int svdm_gfu_config(int port, uint32_t *payload) +{ + return 0; +} + +static int svdm_gfu_attention(int port, uint32_t *payload) +{ + return 0; +} + +const struct svdm_amode_fx supported_modes[] = { + { + .svid = USB_SID_DISPLAYPORT, + .enter = &svdm_enter_dp_mode, + .status = &svdm_dp_status, + .config = &svdm_dp_config, + .post_config = &svdm_dp_post_config, + .attention = &svdm_dp_attention, + .exit = &svdm_exit_dp_mode, + }, + { + .svid = USB_VID_GOOGLE, + .enter = &svdm_enter_gfu_mode, + .status = &svdm_gfu_status, + .config = &svdm_gfu_config, + .attention = &svdm_gfu_attention, + .exit = &svdm_exit_gfu_mode, + } +}; +const int supported_modes_cnt = ARRAY_SIZE(supported_modes); +#endif /* CONFIG_USB_PD_ALT_MODE_DFP */ |