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author | Jett Rink <jettrink@chromium.org> | 2018-08-30 16:13:26 -0600 |
---|---|---|
committer | chrome-bot <chrome-bot@chromium.org> | 2018-09-05 16:11:04 -0700 |
commit | daed130e62e7332037e46c70277816e0630ad04a (patch) | |
tree | c43f204a27f41a41a46c41905957f104123934c0 /board/reef_mchp | |
parent | 4173a851603b2e00b241150092292b5a29ba3be2 (diff) | |
download | chrome-ec-daed130e62e7332037e46c70277816e0630ad04a.tar.gz |
ss-mux: update semantics for TCPC/MUX only used as MUX
This converts the compile time option of
CONFIG_USB_PD_TCPM_TCPCI_MUX_ONLY into a runtime option to better
support draggon egg designs and reduce CONFIG complexity in general.
Introduce new mux_read/write to read from tcpc_config_t or mux driver
depending on new flag setting.
Audited all mux drivers for any use of tcpc_read/write and updated to
mux_read/write.
BRANCH=none
BUG=b:110937880
TEST=On Bip with CL stack:
Verified by connecting DP monitor at boot;
Verified plug / unplug of DP cable works;
Change-Id: I968893b886ff0ccc4074beae5ec42973814ae77c
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1200062
Commit-Ready: Gaggery Tsai <gaggery.tsai@intel.corp-partner.google.com>
Reviewed-by: Scott Collyer <scollyer@chromium.org>
Diffstat (limited to 'board/reef_mchp')
-rw-r--r-- | board/reef_mchp/board.c | 5 |
1 files changed, 2 insertions, 3 deletions
diff --git a/board/reef_mchp/board.c b/board/reef_mchp/board.c index 4efe7dcdb3..81d6134915 100644 --- a/board/reef_mchp/board.c +++ b/board/reef_mchp/board.c @@ -413,13 +413,12 @@ const int hibernate_wake_pins_used = ARRAY_SIZE(hibernate_wake_pins); * results taking up to 10ms before I2C communication with PS8751 * is stable. Don't know how to fix this. */ -static int ps8751_tune_mux(const struct usb_mux *mux) +static int ps8751_tune_mux(int port) { int rv; /* 0x98 sets lower EQ of DP port (4.5db) */ - rv = i2c_write8(MCHP_I2C_PORT2, 0x16, - PS8XXX_REG_MUX_DP_EQ_CONFIGURATION, 0x98); + rv = mux_write(port, PS8XXX_REG_MUX_DP_EQ_CONFIGURATION, 0x98); /* TCPCI spec. delay msleep(6); */ |