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| author | Shawn Nematbakhsh <shawnn@chromium.org> | 2016-11-21 18:01:51 -0800 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2016-12-01 19:59:09 -0800 |
| commit | 1bdf8584bb659f44512ec0c88a210d7e60b688bd (patch) | |
| tree | 0d84e589b449fc9e2ba7d0d686268360bc9ce7bc /board/reef | |
| parent | d95b9fc18c9633fe4b22ead2be450438bbc2dc29 (diff) | |
| download | chrome-ec-1bdf8584bb659f44512ec0c88a210d7e60b688bd.tar.gz | |
npcx: flash: Use common code for SPI flash protect reg translation
Common code is more flexible and supports more parts, so delete the
npcx-only register translation code.
BUG=chrome-os-partner:60029
BRANCH=gru
TEST=Manual on gru, run 'flashrom -p ec --wp-enable' and check that 0x28
gets written to SR1, which matches our desired 'protect botton 128KB',
according to the datasheet. Also run 'flashrom -p ec --erase' then read
back EC SPI contents, verify ROM is erased except for first 128KB
region.
Change-Id: I526401997ff7ec77f2a6047a4a9af74a671ed69a
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/413228
Reviewed-by: David Hendricks <dhendrix@chromium.org>
(cherry picked from commit 43634d36d273887b1f2349c333a7b4b229a83365)
Reviewed-on: https://chromium-review.googlesource.com/415498
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Diffstat (limited to 'board/reef')
| -rw-r--r-- | board/reef/board.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/board/reef/board.h b/board/reef/board.h index 80157e91df..c43ec225df 100644 --- a/board/reef/board.h +++ b/board/reef/board.h @@ -154,6 +154,7 @@ #define WIRELESS_GPIO_WLAN_POWER GPIO_WIRELESS_GPIO_WLAN_POWER #define CONFIG_FLASH_SIZE 524288 +#define CONFIG_SPI_FLASH_REGS #define CONFIG_SPI_FLASH_W25Q40 /* FIXME: Should be GD25LQ40? */ /* |