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authorDaisuke Nojiri <dnojiri@chromium.org>2016-07-27 15:46:42 -0700
committerchrome-bot <chrome-bot@chromium.org>2016-10-07 21:51:54 -0700
commit473ecbe2b36bc44da2552cd5814874a495913fc1 (patch)
tree116b0c658c2fa7916941d114d3ddb6ea33e8a71a /board/nucleo-f072rb
parent241d9e3728c6e2d23d71330be6ddfa5015414f1d (diff)
downloadchrome-ec-473ecbe2b36bc44da2552cd5814874a495913fc1.tar.gz
cts: Add real interrupt test
Interrupt test checks whether DUT can be interrupted by an interrupt and an interrupt handler can be invoked as expected. Note the previous interrupt test ported from test/interrupt.c runs in an emulated environment on the host, thus does not test the real interrupt capability of the chip. BUG=chromium:653195 BRANCH=none TEST=Run cts.py -m interrupt Change-Id: I21cecff07594f048633d1c1b699fb3a1876379e0 Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/363943 Reviewed-by: Randall Spangler <rspangler@chromium.org>
Diffstat (limited to 'board/nucleo-f072rb')
-rw-r--r--board/nucleo-f072rb/board.c10
-rw-r--r--board/nucleo-f072rb/gpio.inc12
2 files changed, 22 insertions, 0 deletions
diff --git a/board/nucleo-f072rb/board.c b/board/nucleo-f072rb/board.c
index c3489a9617..1d60231ebe 100644
--- a/board/nucleo-f072rb/board.c
+++ b/board/nucleo-f072rb/board.c
@@ -16,6 +16,16 @@ void button_event(enum gpio_signal signal)
gpio_set_level(GPIO_LED_U, 1);
}
+#ifdef CTS_MODULE
+/*
+ * Dummy interrupt handler. It's supposed to be overwritten by each suite
+ * if needed.
+ */
+__attribute__((weak)) void cts_irq(enum gpio_signal signal)
+{
+}
+#endif
+
#include "gpio_list.h"
void tick_event(void)
diff --git a/board/nucleo-f072rb/gpio.inc b/board/nucleo-f072rb/gpio.inc
index 3515d5ca84..31149bf633 100644
--- a/board/nucleo-f072rb/gpio.inc
+++ b/board/nucleo-f072rb/gpio.inc
@@ -9,6 +9,16 @@
* Note: Those with interrupt handlers must be declared first. */
GPIO_INT(USER_BUTTON, PIN(C, 13), GPIO_INT_FALLING, button_event)
+#ifdef CTS_MODULE
+#ifndef CTS_MODULE_GPIO
+/* Overload C1 for interrupt. Enabled only for non-GPIO suites as
+ * GPIO tests don't require a separate notification line. */
+GPIO_INT(CTS_IRQ, PIN(C, 1), GPIO_INT_FALLING | GPIO_PULL_UP , cts_irq)
+/* Used to disable interrupt. This IRQ# has to match the number used for the
+ * pin set above */
+#define CTS_IRQ_NUMBER STM32_IRQ_EXTI0_1
+#endif
+#endif
/* Outputs */
GPIO(LED_U, PIN(A, 5), GPIO_OUT_LOW)
@@ -29,6 +39,8 @@ ALTERNATE(PIN_MASK(B, 0x00C0), GPIO_ALT_F1, MODULE_I2C, GPIO_PULL_UP)
/* CTS Signals */
GPIO(HANDSHAKE_INPUT, PIN(A, 4), GPIO_INPUT | GPIO_PULL_UP)
GPIO(HANDSHAKE_OUTPUT, PIN(B, 0), GPIO_ODR_LOW)
+#ifdef CTS_MODULE_GPIO
GPIO(INPUT_TEST, PIN(C, 1), GPIO_INPUT | GPIO_PULL_UP)
+#endif
GPIO(OUTPUT_TEST, PIN(C, 0), GPIO_ODR_LOW)
#endif