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authorMulin Chao <mlchao@nuvoton.com>2017-04-10 11:32:57 +0800
committerchrome-bot <chrome-bot@chromium.org>2017-04-16 11:51:21 -0700
commitea7226e207cde297948f028bb9cb2bbf711c943f (patch)
tree1859ba342bfa7b83c48c4f76b67bef30d96e581f /board/npcx_evb
parentc9d4c1cd6dd1082bd8ae7b2997cb4516315d648d (diff)
downloadchrome-ec-ea7226e207cde297948f028bb9cb2bbf711c943f.tar.gz
npcx_evb: npcx_evb_arm: kahlee: Change pwm frequency of fan.
Change pwm freq of fan from 100 to 25kHz. Normally, the operating freq of pwm fan is around 25kHz. The inappropriate pwm freq will cause the response time of fan spped is too long. Please notice the source clock of pwm is apb2 now. The clock will be gating if ec enters deep sleep. It should not enalbe CONFIG_LOW_POWER_S0 in board-level driver if fan is used. BRANCH=none BUG=none TEST=test fan used in kahlee and Sunon fan with fanset command on npcx_evb and use faninfo for verifying. Change-Id: Ic0e7509d9cdb2758bc6e674c207ac3dfbdc59dbe Signed-off-by: Mulin Chao <mlchao@nuvoton.com> Reviewed-on: https://chromium-review.googlesource.com/472647 Reviewed-by: Shawn N <shawnn@chromium.org>
Diffstat (limited to 'board/npcx_evb')
-rw-r--r--board/npcx_evb/board.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/board/npcx_evb/board.c b/board/npcx_evb/board.c
index baaf040e15..570d615d01 100644
--- a/board/npcx_evb/board.c
+++ b/board/npcx_evb/board.c
@@ -45,7 +45,7 @@ BUILD_ASSERT(ARRAY_SIZE(adc_channels) == ADC_CH_COUNT);
/******************************************************************************/
/* PWM channels. Must be in the exactly same order as in enum pwm_channel. */
const struct pwm_t pwm_channels[] = {
- [PWM_CH_FAN] = { 0, PWM_CONFIG_DSLEEP | PWM_CONFIG_OPEN_DRAIN, 100},
+ [PWM_CH_FAN] = { 0, PWM_CONFIG_OPEN_DRAIN, 25000},
[PWM_CH_KBLIGHT] = { 1, 0, 10000 },
};
BUILD_ASSERT(ARRAY_SIZE(pwm_channels) == PWM_CH_COUNT);