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author | Furquan Shaikh <furquan@google.com> | 2018-03-02 12:06:20 -0800 |
---|---|---|
committer | ChromeOS Commit Bot <chromeos-commit-bot@chromium.org> | 2018-03-05 20:00:34 +0000 |
commit | 821ce6098d0d64dfe8d9056f3095e6324f73bcdb (patch) | |
tree | a252d14c5a829c7171f9f1ec8abb13f796126170 /board/nami/board.h | |
parent | c06a64a15c3973e34af1bf2d125a53b325f96158 (diff) | |
download | chrome-ec-821ce6098d0d64dfe8d9056f3095e6324f73bcdb.tar.gz |
npcx: Preserve default values of HW_WIRE
NPCX7 requires that the HW_WIRE bits 2-0 of VWEVSM2 register are set
so that the hardwire signals for SCI, SMI and RCIN are connected to VW
input of eSPI_SIF module. NPCX5 did this by default, however NPCX7 has
made it configurable.
NPCX7 however sets the HW_WIRE bits 2-0 to 1 at reset. So, this change
ensures that they are preserved while initializing VWEVSM2 registers
BUG=b:74111394
BRANCH=None
TEST=Verified that SCI works on glkrvp and meowth with NPCX7.
Change-Id: I9da6f45b4aa0b72b68db6192cb7567f09b072f0c
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://chromium-review.googlesource.com/943801
Commit-Ready: Furquan Shaikh <furquan@chromium.org>
Tested-by: Divya S Sasidharan <divya.s.sasidharan@intel.com>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: ML Chao <mlchao@nuvoton.corp-partner.google.com>
Reviewed-by: Jett Rink <jettrink@chromium.org>
(cherry picked from commit f32d92b7f5aa5e6951133bb7b893d264b1bb70e2)
Reviewed-on: https://chromium-review.googlesource.com/949615
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Commit-Queue: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Trybot-Ready: Furquan Shaikh <furquan@chromium.org>
Diffstat (limited to 'board/nami/board.h')
0 files changed, 0 insertions, 0 deletions