diff options
| author | Dino Li <Dino.Li@ite.com.tw> | 2018-06-05 14:41:03 +0800 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2018-06-06 01:16:12 -0700 |
| commit | 8290d879dab1fbba805cfcdb4f2409bdee803dc6 (patch) | |
| tree | 01de7c883b8e7d65bebd0dc842d39b46c5104465 /board/glkrvp_ite | |
| parent | c06b3916770535270faf790c43866708b433bfd4 (diff) | |
| download | chrome-ec-8290d879dab1fbba805cfcdb4f2409bdee803dc6.tar.gz | |
it83xx: espi: enable eSPI_reset#
With this patch, EC will reset peripheral, OOB message,
virtual wire, and flash access channels to default settings
while the eSPI_reset# pin is asserted.
BUG=b:80250980
BRANCH=none
TEST=ran console command `hibernate` or 'apshutdown' during system boot
to kernel and then wake system up by power button x 100.
Change-Id: Iceb7ddf1a045937c004f429fc46a7346578b0cce
Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
Reviewed-on: https://chromium-review.googlesource.com/1074672
Tested-by: Stephanie Payton <stephie0128@gmail.com>
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Diffstat (limited to 'board/glkrvp_ite')
| -rw-r--r-- | board/glkrvp_ite/board.c | 1 | ||||
| -rw-r--r-- | board/glkrvp_ite/gpio.inc | 4 |
2 files changed, 5 insertions, 0 deletions
diff --git a/board/glkrvp_ite/board.c b/board/glkrvp_ite/board.c index 7194259fa6..fab4e8dde7 100644 --- a/board/glkrvp_ite/board.c +++ b/board/glkrvp_ite/board.c @@ -15,6 +15,7 @@ #include "host_command.h" #include "i2c.h" #include "ioexpander_pca9555.h" +#include "intc.h" #include "keyboard_scan.h" #include "lid_switch.h" #include "power.h" diff --git a/board/glkrvp_ite/gpio.inc b/board/glkrvp_ite/gpio.inc index bd37b1dd61..2cda04e59c 100644 --- a/board/glkrvp_ite/gpio.inc +++ b/board/glkrvp_ite/gpio.inc @@ -29,6 +29,10 @@ GPIO_INT(POWER_BUTTON_L,PIN(E, 4), GPIO_INT_BOTH, power_button_interrupt) GPIO_INT(AC_PRESENT, PIN(A, 6), GPIO_INT_BOTH, extpower_interrupt) GPIO_INT(UART1_RX, PIN(B, 0), GPIO_INT_FALLING, uart_deepsleep_interrupt) /* UART1 RX input */ +#ifdef CONFIG_HOSTCMD_ESPI +/* enable 1.8v input of EC's espi_reset pin, and then this pin takes effect. */ +GPIO_INT(ESPI_RESET_L, PIN(D, 2), GPIO_INT_FALLING | GPIO_SEL_1P8V, espi_reset_pin_asserted_interrupt) /* eSPI_reset# */ +#endif /* Type-C interrupts */ UNIMPLEMENTED(USB_C0_PD_INT_ODL) |