diff options
author | Denis Brockus <dbrockus@chromium.org> | 2019-07-16 15:10:11 -0600 |
---|---|---|
committer | Commit Bot <commit-bot@chromium.org> | 2019-08-23 00:12:33 +0000 |
commit | 6d39786d6a22fc355cd4d7eea384d254819c6a38 (patch) | |
tree | 1498442d7f20871ab76d7cfc50e843c4614f2616 /board/glkrvp_ite | |
parent | 5ef0acf4d369e48013da29e5f20f11bfab82155a (diff) | |
download | chrome-ec-6d39786d6a22fc355cd4d7eea384d254819c6a38.tar.gz |
Remove __7b, __8b and __7bf
The extentions were added to make the compiler perform most
of the verification that the conversion was being done correctly
to remove 8bit addressing as the standard I2C/SPI address type.
Now that the compiler has verified the code, the extra
extentions are being removed
BUG=chromium:971296
BRANCH=none
TEST=make buildall -j
TEST=verify sensor functionality on arcada_ish
Change-Id: I36894f8bb9daefb5b31b5e91577708f6f9af2a4f
Signed-off-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1704792
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1767528
Reviewed-by: Edward Hill <ecgh@chromium.org>
Commit-Queue: Edward Hill <ecgh@chromium.org>
Tested-by: Edward Hill <ecgh@chromium.org>
Diffstat (limited to 'board/glkrvp_ite')
-rw-r--r-- | board/glkrvp_ite/battery.c | 4 | ||||
-rw-r--r-- | board/glkrvp_ite/board.c | 44 | ||||
-rw-r--r-- | board/glkrvp_ite/board.h | 2 | ||||
-rw-r--r-- | board/glkrvp_ite/chg_usb_pd.c | 4 |
4 files changed, 27 insertions, 27 deletions
diff --git a/board/glkrvp_ite/battery.c b/board/glkrvp_ite/battery.c index 5665b1f557..f8665e2b58 100644 --- a/board/glkrvp_ite/battery.c +++ b/board/glkrvp_ite/battery.c @@ -199,8 +199,8 @@ enum battery_present battery_hw_present(void) int data; int rv; - rv = pca9555_read__7bf(I2C_PORT_PCA555_PMIC_BATT_GPIO, - I2C_ADDR_PCA555_PMIC_BATT_GPIO__7bf, + rv = pca9555_read(I2C_PORT_PCA555_PMIC_BATT_GPIO, + I2C_ADDR_PCA555_PMIC_BATT_GPIO_FLAGS, PCA9555_CMD_INPUT_PORT_0, &data); /* GPIO is low when the battery is physically present */ diff --git a/board/glkrvp_ite/board.c b/board/glkrvp_ite/board.c index 21e712b266..4dba9156f8 100644 --- a/board/glkrvp_ite/board.c +++ b/board/glkrvp_ite/board.c @@ -31,7 +31,7 @@ #include "gpio_list.h" #define I2C_PORT_PCA555_BOARD_ID_GPIO IT83XX_I2C_CH_C -#define I2C_ADDR_PCA555_BOARD_ID_GPIO__7bf 0x20 +#define I2C_ADDR_PCA555_BOARD_ID_GPIO_FLAGS 0x20 /* power signal list. Must match order of enum power_signal. */ const struct power_signal_info power_signal_list[] = { @@ -70,8 +70,8 @@ void chipset_pre_init_callback(void) { int data; - if (pca9555_read__7bf(I2C_PORT_PCA555_PMIC_BATT_GPIO, - I2C_ADDR_PCA555_PMIC_BATT_GPIO__7bf, + if (pca9555_read(I2C_PORT_PCA555_PMIC_BATT_GPIO, + I2C_ADDR_PCA555_PMIC_BATT_GPIO_FLAGS, PCA9555_CMD_OUTPUT_PORT_0, &data)) return; @@ -85,16 +85,16 @@ void chipset_pre_init_callback(void) /* Enable SOC_3P3_EN_L: Set the Output port O0.1 to low level */ data &= ~PCA9555_IO_1; - pca9555_write__7bf(I2C_PORT_PCA555_PMIC_BATT_GPIO, - I2C_ADDR_PCA555_PMIC_BATT_GPIO__7bf, + pca9555_write(I2C_PORT_PCA555_PMIC_BATT_GPIO, + I2C_ADDR_PCA555_PMIC_BATT_GPIO_FLAGS, PCA9555_CMD_OUTPUT_PORT_0, data); /* TODO: Find out from the spec */ msleep(10); /* Enable PMIC_EN: Set the Output port O0.0 to high level */ - pca9555_write__7bf(I2C_PORT_PCA555_PMIC_BATT_GPIO, - I2C_ADDR_PCA555_PMIC_BATT_GPIO__7bf, + pca9555_write(I2C_PORT_PCA555_PMIC_BATT_GPIO, + I2C_ADDR_PCA555_PMIC_BATT_GPIO_FLAGS, PCA9555_CMD_OUTPUT_PORT_0, data | PCA9555_IO_0); } @@ -121,23 +121,23 @@ void chipset_do_shutdown(void) { int data; - if (pca9555_read__7bf(I2C_PORT_PCA555_PMIC_BATT_GPIO, - I2C_ADDR_PCA555_PMIC_BATT_GPIO__7bf, + if (pca9555_read(I2C_PORT_PCA555_PMIC_BATT_GPIO, + I2C_ADDR_PCA555_PMIC_BATT_GPIO_FLAGS, PCA9555_CMD_OUTPUT_PORT_0, &data)) return; /* Disable SOC_3P3_EN_L: Set the Output port O0.1 to high level */ data |= PCA9555_IO_1; - pca9555_write__7bf(I2C_PORT_PCA555_PMIC_BATT_GPIO, - I2C_ADDR_PCA555_PMIC_BATT_GPIO__7bf, + pca9555_write(I2C_PORT_PCA555_PMIC_BATT_GPIO, + I2C_ADDR_PCA555_PMIC_BATT_GPIO_FLAGS, PCA9555_CMD_OUTPUT_PORT_0, data); /* TODO: Find out from the spec */ msleep(10); /* Disable PMIC_EN: Set the Output port O0.0 to low level */ - pca9555_write__7bf(I2C_PORT_PCA555_PMIC_BATT_GPIO, - I2C_ADDR_PCA555_PMIC_BATT_GPIO__7bf, + pca9555_write(I2C_PORT_PCA555_PMIC_BATT_GPIO, + I2C_ADDR_PCA555_PMIC_BATT_GPIO_FLAGS, PCA9555_CMD_OUTPUT_PORT_0, data & ~PCA9555_IO_0); } @@ -162,9 +162,9 @@ int board_get_version(void) { int data; - if (pca9555_read__7bf(I2C_PORT_PCA555_BOARD_ID_GPIO, - I2C_ADDR_PCA555_BOARD_ID_GPIO__7bf, - PCA9555_CMD_INPUT_PORT_1, &data)) + if (pca9555_read(I2C_PORT_PCA555_BOARD_ID_GPIO, + I2C_ADDR_PCA555_BOARD_ID_GPIO_FLAGS, + PCA9555_CMD_INPUT_PORT_1, &data)) return -1; return data & 0x0f; @@ -181,9 +181,9 @@ static void pmic_init(void) * Configure Port O0.0 as Output port - PMIC_EN * Configure Port O0.1 as Output port - SOC_3P3_EN_L */ - pca9555_write__7bf(I2C_PORT_PCA555_PMIC_BATT_GPIO, - I2C_ADDR_PCA555_PMIC_BATT_GPIO__7bf, - PCA9555_CMD_CONFIGURATION_PORT_0, 0xfc); + pca9555_write(I2C_PORT_PCA555_PMIC_BATT_GPIO, + I2C_ADDR_PCA555_PMIC_BATT_GPIO_FLAGS, + PCA9555_CMD_CONFIGURATION_PORT_0, 0xfc); /* * Set the Output port O0.0 to low level - PMIC_EN @@ -192,9 +192,9 @@ static void pmic_init(void) * POR of PCA9555 port is input with high impedance hence explicitly * configure the SOC_3P3_EN_L to high level. */ - pca9555_write__7bf(I2C_PORT_PCA555_PMIC_BATT_GPIO, - I2C_ADDR_PCA555_PMIC_BATT_GPIO__7bf, - PCA9555_CMD_OUTPUT_PORT_0, 0xfe); + pca9555_write(I2C_PORT_PCA555_PMIC_BATT_GPIO, + I2C_ADDR_PCA555_PMIC_BATT_GPIO_FLAGS, + PCA9555_CMD_OUTPUT_PORT_0, 0xfe); } DECLARE_HOOK(HOOK_INIT, pmic_init, HOOK_PRIO_INIT_I2C + 1); diff --git a/board/glkrvp_ite/board.h b/board/glkrvp_ite/board.h index bc5147045b..355f34ac64 100644 --- a/board/glkrvp_ite/board.h +++ b/board/glkrvp_ite/board.h @@ -114,7 +114,7 @@ #define I2C_PORT_USB_MUX IT83XX_I2C_CH_B #define I2C_PORT_PCA555_PMIC_BATT_GPIO IT83XX_I2C_CH_C -#define I2C_ADDR_PCA555_PMIC_BATT_GPIO__7bf 0x21 +#define I2C_ADDR_PCA555_PMIC_BATT_GPIO_FLAGS 0x21 /* EC exclude modules */ #undef CONFIG_ADC diff --git a/board/glkrvp_ite/chg_usb_pd.c b/board/glkrvp_ite/chg_usb_pd.c index dbf20fdbbc..364b115243 100644 --- a/board/glkrvp_ite/chg_usb_pd.c +++ b/board/glkrvp_ite/chg_usb_pd.c @@ -35,7 +35,7 @@ const struct tcpc_config_t tcpc_config[CONFIG_USB_PD_PORT_COUNT] = { .bus_type = EC_BUS_TYPE_I2C, .i2c_info = { .port = IT83XX_I2C_CH_B, - .addr__7bf = 0x50, + .addr_flags = 0x50, }, .drv = &tcpci_tcpm_drv, }, @@ -43,7 +43,7 @@ const struct tcpc_config_t tcpc_config[CONFIG_USB_PD_PORT_COUNT] = { .bus_type = EC_BUS_TYPE_I2C, .i2c_info = { .port = IT83XX_I2C_CH_B, - .addr__7bf = 0x52, + .addr_flags = 0x52, }, .drv = &tcpci_tcpm_drv, }, |